store MC FP immediates as a double instead of as an APFloat, thus avoiding an

unnecessary dtor for MCOperand.

llvm-svn: 114064

llvm/include/llvm/MC/MCInst.h

@@ -16,7 +16,6 @@
 #ifndef LLVM_MC_MCINST_H
 #define LLVM_MC_MCINST_H
 
-#include "llvm/ADT/APFloat.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/System/DataTypes.h"
@@ -42,11 +41,9 @@ class MCOperand {
   union {
     unsigned RegVal;
     int64_t ImmVal;
+    double FPImmVal;
     const MCExpr *ExprVal;
   };
-  // This can't go in the union due to the non-trivial copy constructor
-  // of APFloat. It's still only valid for Kind == kFPImmediate, though.
-  APFloat FPImmVal;
 public:
 
   MCOperand() : Kind(kInvalid), FPImmVal(0.0) {}
@@ -78,12 +75,12 @@ public:
     ImmVal = Val;
   }
 
-  const APFloat &getFPImm() const {
+  const double &getFPImm() const {
     assert(isFPImm() && "This is not an FP immediate");
     return FPImmVal;
   }
 
-  void setFPImm(const APFloat &Val) {
+  void setFPImm(double Val) {
     assert(isFPImm() && "This is not an FP immediate");
     FPImmVal = Val;
   }
@@ -109,7 +106,7 @@ public:
     Op.ImmVal = Val;
     return Op;
   }
-  static MCOperand CreateFPImm(const APFloat &Val) {
+  static MCOperand CreateFPImm(double Val) {
     MCOperand Op;
     Op.Kind = kFPImmediate;
     Op.FPImmVal = Val;

llvm/lib/Target/ARM/ARMMCInstLower.cpp

@@ -157,7 +157,8 @@ void ARMMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
                                               MO.getBlockAddress()));
       break;
     case MachineOperand::MO_FPImmediate:
-      MCOp = MCOperand::CreateFPImm(MO.getFPImm()->getValueAPF());
+      MCOp =
+        MCOperand::CreateFPImm(MO.getFPImm()->getValueAPF().convertToDouble());
       break;
     }
 

llvm/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp

@@ -747,12 +747,12 @@ void ARMInstPrinter::printT2AddrModeSoRegOperand(const MCInst *MI,
 
 void ARMInstPrinter::printVFPf32ImmOperand(const MCInst *MI, unsigned OpNum,
                                            raw_ostream &O) {
-  O << '#' << MI->getOperand(OpNum).getFPImm().convertToFloat();
+  O << '#' << (float)MI->getOperand(OpNum).getFPImm();
 }
 
 void ARMInstPrinter::printVFPf64ImmOperand(const MCInst *MI, unsigned OpNum,
                                            raw_ostream &O) {
-  O << '#' << MI->getOperand(OpNum).getFPImm().convertToDouble();
+  O << '#' << MI->getOperand(OpNum).getFPImm();
 }
 
 void ARMInstPrinter::printNEONModImmOperand(const MCInst *MI, unsigned OpNum,

llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp

@@ -1973,7 +1973,10 @@ static bool DisassembleVFPMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
     // The asm syntax specifies the floating point value, not the 8-bit literal.
     APInt immRaw = VFPExpandImm(slice(insn,19,16) << 4 | slice(insn, 3, 0),
                              Opcode == ARM::FCONSTD ? 64 : 32);
-    MI.addOperand(MCOperand::CreateFPImm(APFloat(immRaw, true)));
+    APFloat immFP = APFloat(immRaw, true);
+    double imm = Opcode == ARM::FCONSTD ? immFP.convertToDouble() :
+      immFP.convertToFloat();
+    MI.addOperand(MCOperand::CreateFPImm(imm));
 
     ++OpIdx;
   }