[X86] Use inlineasm flag output for the _bittest* intrinsics.
Instead of expliciting emitting a setc in the inline asm instructions, we can use flag output. This allows the backend to use the flag directly if it is needed by a branch. Previously we needed a test instruction to convert the register back to a flag. If the flag can't be used directly, the backend will emit a setcc. Differential Revision: https://reviews.llvm.org/D87888
This commit is contained in:
Craig Topper
parent
2f768a68a1
commit
288c5776c9
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@ -805,10 +805,10 @@ static llvm::Value *EmitX86BitTestIntrinsic(CodeGenFunction &CGF,
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AsmOS << "bt";
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if (Action)
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AsmOS << Action;
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AsmOS << SizeSuffix << " $2, ($1)\n\tsetc ${0:b}";
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AsmOS << SizeSuffix << " $2, ($1)";
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// Build the constraints. FIXME: We should support immediates when possible.
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std::string Constraints = "=r,r,r,~{cc},~{memory}";
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std::string Constraints = "={@ccc},r,r,~{cc},~{memory}";
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std::string MachineClobbers = CGF.getTarget().getClobbers();
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if (!MachineClobbers.empty()) {
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Constraints += ',';
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@ -34,20 +34,20 @@ void test_arm(long *base, long idx) {
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#endif
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// X64-LABEL: define dso_local void @test32(i32* %base, i32 %idx)
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// X64: call i8 asm sideeffect "btl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "btcl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "btrl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "btsl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "lock btrl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "lock btsl $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "btl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "btcl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "btrl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "btsl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "lock btrl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32 {{.*}})
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// X64: call i8 asm sideeffect "lock btsl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %{{.*}}, i32 {{.*}})
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// X64-LABEL: define dso_local void @test64(i64* %base, i64 %idx)
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// X64: call i8 asm sideeffect "btq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "btcq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "btrq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "btsq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "lock btrq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "lock btsq $2, ($1)\0A\09setc ${0:b}", "=r,r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "btq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "btcq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "btrq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "btsq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "lock btrq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %{{.*}}, i64 {{.*}})
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// X64: call i8 asm sideeffect "lock btsq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %{{.*}}, i64 {{.*}})
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// ARM-LABEL: define dso_local {{.*}}void @test32(i32* %base, i32 %idx)
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// ARM: %[[IDXHI:[^ ]*]] = ashr i32 %{{.*}}, 3
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@ -0,0 +1,101 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-windows-msvc19.11.0 | FileCheck %s
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; This matches the code produced by clang/lib/CodeGen/bittest-intrin.c
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@sink = global i8 0, align 1
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define void @test32(i32* %base, i32 %idx) {
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; CHECK-LABEL: test32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb {{.*}}(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btcl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb {{.*}}(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btrl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb {{.*}}(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btsl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb {{.*}}(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: lock btrl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb {{.*}}(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: lock btsl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb {{.*}}(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: lock btsl %edx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb {{.*}}(%rip)
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i8 asm sideeffect "btl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %0, i8* @sink, align 1
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%1 = tail call i8 asm sideeffect "btcl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %1, i8* @sink, align 1
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%2 = tail call i8 asm sideeffect "btrl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %2, i8* @sink, align 1
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%3 = tail call i8 asm sideeffect "btsl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %3, i8* @sink, align 1
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%4 = tail call i8 asm sideeffect "lock btrl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %4, i8* @sink, align 1
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%5 = tail call i8 asm sideeffect "lock btsl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %5, i8* @sink, align 1
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%6 = tail call i8 asm sideeffect "lock btsl $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %base, i32 %idx)
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store volatile i8 %6, i8* @sink, align 1
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ret void
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}
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; Function Attrs: nounwind uwtable
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define void @test64(i64* %base, i64 %idx) {
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; CHECK-LABEL: test64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btq %rdx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb {{.*}}(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btcq %rdx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb {{.*}}(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btrq %rdx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb {{.*}}(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: btsq %rdx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb {{.*}}(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: lock btrq %rdx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb {{.*}}(%rip)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: lock btsq %rdx, (%rcx)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: setb {{.*}}(%rip)
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; CHECK-NEXT: retq
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entry:
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%0 = tail call i8 asm sideeffect "btq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %base, i64 %idx)
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store volatile i8 %0, i8* @sink, align 1
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%1 = tail call i8 asm sideeffect "btcq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %base, i64 %idx)
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store volatile i8 %1, i8* @sink, align 1
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%2 = tail call i8 asm sideeffect "btrq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %base, i64 %idx)
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store volatile i8 %2, i8* @sink, align 1
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%3 = tail call i8 asm sideeffect "btsq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %base, i64 %idx)
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store volatile i8 %3, i8* @sink, align 1
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%4 = tail call i8 asm sideeffect "lock btrq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %base, i64 %idx)
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store volatile i8 %4, i8* @sink, align 1
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%5 = tail call i8 asm sideeffect "lock btsq $2, ($1)", "={@ccc},r,r,~{cc},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %base, i64 %idx)
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store volatile i8 %5, i8* @sink, align 1
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ret void
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}
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