Don't hard-code the mask size to be 32, which is incorrect on ppc64
and was causing aborts with the new APInt changes. This may also be fixing an obscure ppc64 bug. llvm-svn: 47692
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@ -741,16 +741,18 @@ bool PPCTargetLowering::SelectAddressRegReg(SDOperand N, SDOperand &Base,
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APInt LHSKnownZero, LHSKnownOne;
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APInt RHSKnownZero, RHSKnownOne;
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DAG.ComputeMaskedBits(N.getOperand(0),
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APInt::getAllOnesValue(32),
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APInt::getAllOnesValue(N.getOperand(0)
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.getValueSizeInBits()),
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LHSKnownZero, LHSKnownOne);
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if (LHSKnownZero.getBoolValue()) {
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DAG.ComputeMaskedBits(N.getOperand(1),
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APInt::getAllOnesValue(32),
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APInt::getAllOnesValue(N.getOperand(1)
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.getValueSizeInBits()),
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RHSKnownZero, RHSKnownOne);
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// If all of the bits are known zero on the LHS or RHS, the add won't
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// carry.
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if ((LHSKnownZero | RHSKnownZero) == ~0U) {
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if (~(LHSKnownZero | RHSKnownZero) == 0) {
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Base = N.getOperand(0);
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Index = N.getOperand(1);
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return true;
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@ -0,0 +1,27 @@
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; RUN: llvm-as < %s | llc
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
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target triple = "powerpc64-apple-darwin9.2.0"
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%struct.re_pattern_buffer = type <{ i8*, i64, i8, [7 x i8] }>
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define i32 @xre_search_2(%struct.re_pattern_buffer* %bufp, i32 %range) nounwind {
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entry:
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br i1 false, label %bb16, label %bb49
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bb16: ; preds = %entry
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%tmp19 = load i8** null, align 1 ; <i8*> [#uses=1]
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%tmp21 = load i8* %tmp19, align 1 ; <i8> [#uses=1]
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switch i8 %tmp21, label %bb49 [
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i8 0, label %bb45
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i8 1, label %bb34
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]
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bb34: ; preds = %bb16
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ret i32 0
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bb45: ; preds = %bb16
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ret i32 -1
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bb49: ; preds = %bb16, %entry
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ret i32 0
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}
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