diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 4748daae49cb..39537e358b9f 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18510,7 +18510,7 @@ static bool combineRedundantDWordShuffle(SDValue N, MutableArrayRef Mask, SmallVector VMask = getPSHUFShuffleMask(V); for (int &M : Mask) M = VMask[M]; - V = DAG.getNode(X86ISD::PSHUFD, DL, MVT::v4i32, V.getOperand(0), + V = DAG.getNode(X86ISD::PSHUFD, DL, V.getValueType(), V.getOperand(0), getV4X86ShuffleImm8ForMask(Mask, DAG)); // It is possible that one of the combinable shuffles was completely absorbed diff --git a/llvm/test/CodeGen/X86/pshufd-combine-crash.ll b/llvm/test/CodeGen/X86/pshufd-combine-crash.ll new file mode 100644 index 000000000000..84c69e32bcc3 --- /dev/null +++ b/llvm/test/CodeGen/X86/pshufd-combine-crash.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -march=x86-64 -mcpu=corei7 -debug + +; REQUIRES: asserts + +; Test that the dag combiner doesn't assert if we try to replace a sequence of two +; v4f32 X86ISD::PSHUFD nodes with a single PSHUFD. + + +define <4 x float> @test(<4 x float> %V) { + %1 = shufflevector <4 x float> %V, <4 x float> undef, <4 x i32> + %2 = shufflevector <4 x float> %1, <4 x float> undef, <4 x i32> + ret <4 x float> %2 +} +