Add ability to override segment (mostly for code emitter purposes).
llvm-svn: 57380
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2a5754521d
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@ -116,6 +116,7 @@ def X86InstrInfo : InstrInfo {
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"ImmTypeBits",
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"ImmTypeBits",
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"FPFormBits",
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"FPFormBits",
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"hasLockPrefix",
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"hasLockPrefix",
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"SegOvrBits",
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"Opcode"];
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"Opcode"];
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let TSFlagsShifts = [0,
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let TSFlagsShifts = [0,
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6,
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6,
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@ -125,6 +126,7 @@ def X86InstrInfo : InstrInfo {
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13,
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13,
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16,
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16,
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19,
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19,
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20,
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24];
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24];
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}
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}
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@ -412,6 +412,16 @@ void Emitter::emitInstruction(const MachineInstr &MI,
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// Emit the lock opcode prefix as needed.
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// Emit the lock opcode prefix as needed.
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if (Desc->TSFlags & X86II::LOCK) MCE.emitByte(0xF0);
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if (Desc->TSFlags & X86II::LOCK) MCE.emitByte(0xF0);
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// Emit segment overrid opcode prefix as needed.
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switch (Desc->TSFlags & X86II::SegOvrMask) {
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case X86II::FS:
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MCE.emitByte(0x64);
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break;
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case X86II::GS:
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MCE.emitByte(0x65);
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break;
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}
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// Emit the repeat opcode prefix as needed.
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// Emit the repeat opcode prefix as needed.
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if ((Desc->TSFlags & X86II::Op0Mask) == X86II::REP) MCE.emitByte(0xF3);
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if ((Desc->TSFlags & X86II::Op0Mask) == X86II::REP) MCE.emitByte(0xF3);
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@ -63,6 +63,8 @@ class OpSize { bit hasOpSizePrefix = 1; }
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class AdSize { bit hasAdSizePrefix = 1; }
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class AdSize { bit hasAdSizePrefix = 1; }
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class REX_W { bit hasREX_WPrefix = 1; }
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class REX_W { bit hasREX_WPrefix = 1; }
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class LOCK { bit hasLockPrefix = 1; }
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class LOCK { bit hasLockPrefix = 1; }
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class SegFS { bits<2> SegOvrBits = 1; }
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class SegGS { bits<2> SegOvrBits = 2; }
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class TB { bits<4> Prefix = 1; }
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class TB { bits<4> Prefix = 1; }
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class REP { bits<4> Prefix = 2; }
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class REP { bits<4> Prefix = 2; }
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class D8 { bits<4> Prefix = 3; }
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class D8 { bits<4> Prefix = 3; }
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@ -104,6 +106,7 @@ class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins,
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FPFormat FPForm; // What flavor of FP instruction is this?
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FPFormat FPForm; // What flavor of FP instruction is this?
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bits<3> FPFormBits = 0;
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bits<3> FPFormBits = 0;
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bit hasLockPrefix = 0; // Does this inst have a 0xF0 prefix?
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bit hasLockPrefix = 0; // Does this inst have a 0xF0 prefix?
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bits<2> SegOvrBits = 0; // Segment override prefix.
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}
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}
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class I<bits<8> o, Format f, dag outs, dag ins, string asm, list<dag> pattern>
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class I<bits<8> o, Format f, dag outs, dag ins, string asm, list<dag> pattern>
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@ -221,7 +221,14 @@ namespace X86II {
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LOCKShift = 19,
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LOCKShift = 19,
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LOCK = 1 << LOCKShift,
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LOCK = 1 << LOCKShift,
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// Bits 20 -> 23 are unused
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// Segment override prefixes. Currently we just need ability to address
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// stuff in gs and fs segments.
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SegOvrShift = 20,
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SegOvrMask = 3 << SegOvrShift,
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FS = 1 << SegOvrShift,
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GS = 2 << SegOvrShift,
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// Bits 22 -> 23 are unused
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OpcodeShift = 24,
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OpcodeShift = 24,
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OpcodeMask = 0xFF << OpcodeShift
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OpcodeMask = 0xFF << OpcodeShift
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};
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};
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