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[C++11] Remove 'virtual' keyword from methods marked with 'override' keyword. 

llvm-svn: 203444
This commit is contained in:
Craig Topper 2014-03-10 05:29:18 +00:00
parent 415a24e41f
commit 24e685fdb0
8 changed files with 127 additions and 134 deletions
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6
llvm/include/llvm/IR/InstrTypes.h
View File

@ -143,7 +143,7 @@ protected:
const Twine &Name, Instruction *InsertBefore);
BinaryOperator(BinaryOps iType, Value *S1, Value *S2, Type *Ty,
const Twine &Name, BasicBlock *InsertAtEnd);
virtual BinaryOperator *clone_impl() const override;
BinaryOperator *clone_impl() const override;
public:
// allocate space for exactly two operands
void *operator new(size_t s) {
@ -385,7 +385,7 @@ DEFINE_TRANSPARENT_OPERAND_ACCESSORS(BinaryOperator, Value)
/// if (isa<CastInst>(Instr)) { ... }
/// @brief Base class of casting instructions.
class CastInst : public UnaryInstruction {
virtual void anchor() override;
void anchor() override;
protected:
/// @brief Constructor with insert-before-instruction semantics for subclasses
CastInst(Type *Ty, unsigned iType, Value *S,
@ -647,7 +647,7 @@ protected:
Value *LHS, Value *RHS, const Twine &Name,
BasicBlock *InsertAtEnd);
virtual void anchor() override; // Out of line virtual method.
void anchor() override; // Out of line virtual method.
public:
/// This enumeration lists the possible predicates for CmpInst subclasses.
/// Values in the range 0-31 are reserved for FCmpInst, while values in the

2
llvm/include/llvm/MC/MCAssembler.h
View File

@ -221,7 +221,7 @@ public:
}
SmallVectorImpl<char> &getContents() override { return Contents; }
virtual const SmallVectorImpl<char> &getContents() const override {
const SmallVectorImpl<char> &getContents() const override {
return Contents;
}

87
llvm/lib/CodeGen/BasicTargetTransformInfo.cpp
View File

@ -43,11 +43,11 @@ public:
initializeBasicTTIPass(*PassRegistry::getPassRegistry());
}
virtual void initializePass() override {
void initializePass() override {
pushTTIStack(this);
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const override {
void getAnalysisUsage(AnalysisUsage &AU) const override {
TargetTransformInfo::getAnalysisUsage(AU);
}
@ -55,64 +55,61 @@ public:
static char ID;
/// Provide necessary pointer adjustments for the two base classes.
virtual void *getAdjustedAnalysisPointer(const void *ID) override {
void *getAdjustedAnalysisPointer(const void *ID) override {
if (ID == &TargetTransformInfo::ID)
return (TargetTransformInfo*)this;
return this;
}
virtual bool hasBranchDivergence() const override;
bool hasBranchDivergence() const override;
/// \name Scalar TTI Implementations
/// @{
virtual bool isLegalAddImmediate(int64_t imm) const override;
virtual bool isLegalICmpImmediate(int64_t imm) const override;
virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
int64_t BaseOffset, bool HasBaseReg,
int64_t Scale) const override;
virtual int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
int64_t BaseOffset, bool HasBaseReg,
int64_t Scale) const override;
virtual bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
virtual bool isTypeLegal(Type *Ty) const override;
virtual unsigned getJumpBufAlignment() const override;
virtual unsigned getJumpBufSize() const override;
virtual bool shouldBuildLookupTables() const override;
virtual bool haveFastSqrt(Type *Ty) const override;
virtual void getUnrollingPreferences(
Loop *L, UnrollingPreferences &UP) const override;
bool isLegalAddImmediate(int64_t imm) const override;
bool isLegalICmpImmediate(int64_t imm) const override;
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
int64_t BaseOffset, bool HasBaseReg,
int64_t Scale) const override;
int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
int64_t BaseOffset, bool HasBaseReg,
int64_t Scale) const override;
bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
bool isTypeLegal(Type *Ty) const override;
unsigned getJumpBufAlignment() const override;
unsigned getJumpBufSize() const override;
bool shouldBuildLookupTables() const override;
bool haveFastSqrt(Type *Ty) const override;
void getUnrollingPreferences(Loop *L,
UnrollingPreferences &UP) const override;
/// @}
/// \name Vector TTI Implementations
/// @{
virtual unsigned getNumberOfRegisters(bool Vector) const override;
virtual unsigned getMaximumUnrollFactor() const override;
virtual unsigned getRegisterBitWidth(bool Vector) const override;
virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty,
OperandValueKind,
OperandValueKind) const override;
virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
int Index, Type *SubTp) const override;
virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
Type *Src) const override;
virtual unsigned getCFInstrCost(unsigned Opcode) const override;
virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
Type *CondTy) const override;
virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
unsigned Index) const override;
virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
unsigned Alignment,
unsigned AddressSpace) const override;
virtual unsigned getIntrinsicInstrCost(
Intrinsic::ID, Type *RetTy, ArrayRef<Type*> Tys) const override;
virtual unsigned getNumberOfParts(Type *Tp) const override;
virtual unsigned getAddressComputationCost(
Type *Ty, bool IsComplex) const override;
virtual unsigned getReductionCost(unsigned Opcode, Type *Ty,
bool IsPairwise) const override;
unsigned getNumberOfRegisters(bool Vector) const override;
unsigned getMaximumUnrollFactor() const override;
unsigned getRegisterBitWidth(bool Vector) const override;
unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind,
OperandValueKind) const override;
unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
int Index, Type *SubTp) const override;
unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
Type *Src) const override;
unsigned getCFInstrCost(unsigned Opcode) const override;
unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
Type *CondTy) const override;
unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
unsigned Index) const override;
unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
unsigned AddressSpace) const override;
unsigned getIntrinsicInstrCost(Intrinsic::ID, Type *RetTy,
ArrayRef<Type*> Tys) const override;
unsigned getNumberOfParts(Type *Tp) const override;
unsigned getAddressComputationCost( Type *Ty, bool IsComplex) const override;
unsigned getReductionCost(unsigned Opcode, Type *Ty,
bool IsPairwise) const override;
/// @}
};

42
llvm/lib/CodeGen/MachineScheduler.cpp
View File

@ -2444,29 +2444,29 @@ public:
GenericSchedulerBase(C), DAG(0), Top(SchedBoundary::TopQID, "TopQ"),
Bot(SchedBoundary::BotQID, "BotQ") {}
virtual void initPolicy(MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned NumRegionInstrs) override;
void initPolicy(MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned NumRegionInstrs) override;
virtual bool shouldTrackPressure() const override {
bool shouldTrackPressure() const override {
return RegionPolicy.ShouldTrackPressure;
}
virtual void initialize(ScheduleDAGMI *dag) override;
void initialize(ScheduleDAGMI *dag) override;
virtual SUnit *pickNode(bool &IsTopNode) override;
SUnit *pickNode(bool &IsTopNode) override;
virtual void schedNode(SUnit *SU, bool IsTopNode) override;
void schedNode(SUnit *SU, bool IsTopNode) override;
virtual void releaseTopNode(SUnit *SU) override {
void releaseTopNode(SUnit *SU) override {
Top.releaseTopNode(SU);
}
virtual void releaseBottomNode(SUnit *SU) override {
void releaseBottomNode(SUnit *SU) override {
Bot.releaseBottomNode(SU);
}
virtual void registerRoots() override;
void registerRoots() override;
protected:
void checkAcyclicLatency();
@ -3037,16 +3037,16 @@ public:
virtual ~PostGenericScheduler() {}
virtual void initPolicy(MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned NumRegionInstrs) override {
void initPolicy(MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned NumRegionInstrs) override {
/* no configurable policy */
};
/// PostRA scheduling does not track pressure.
virtual bool shouldTrackPressure() const override { return false; }
bool shouldTrackPressure() const override { return false; }
virtual void initialize(ScheduleDAGMI *Dag) override {
void initialize(ScheduleDAGMI *Dag) override {
DAG = Dag;
SchedModel = DAG->getSchedModel();
TRI = DAG->TRI;
@ -3065,22 +3065,22 @@ public:
}
}
virtual void registerRoots() override;
void registerRoots() override;
virtual SUnit *pickNode(bool &IsTopNode) override;
SUnit *pickNode(bool &IsTopNode) override;
virtual void scheduleTree(unsigned SubtreeID) override {
void scheduleTree(unsigned SubtreeID) override {
llvm_unreachable("PostRA scheduler does not support subtree analysis.");
}
virtual void schedNode(SUnit *SU, bool IsTopNode) override;
void schedNode(SUnit *SU, bool IsTopNode) override;
virtual void releaseTopNode(SUnit *SU) override {
void releaseTopNode(SUnit *SU) override {
Top.releaseTopNode(SU);
}
// Only called for roots.
virtual void releaseBottomNode(SUnit *SU) override {
void releaseBottomNode(SUnit *SU) override {
BotRoots.push_back(SU);
}

39
llvm/lib/Target/ARM/ARMAsmPrinter.h
View File

@ -49,36 +49,36 @@ public:
Subtarget = &TM.getSubtarget<ARMSubtarget>();
}
virtual const char *getPassName() const override {
const char *getPassName() const override {
return "ARM Assembly / Object Emitter";
}
void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
const char *Modifier = 0);
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &O) override;
virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &O) override;
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &O) override;
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &O) override;
virtual void emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,
const MCSubtargetInfo *EndInfo) const override;
void emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,
const MCSubtargetInfo *EndInfo) const override;
void EmitJumpTable(const MachineInstr *MI);
void EmitJump2Table(const MachineInstr *MI);
virtual void EmitInstruction(const MachineInstr *MI) override;
virtual bool runOnMachineFunction(MachineFunction &F) override;
void EmitInstruction(const MachineInstr *MI) override;
bool runOnMachineFunction(MachineFunction &F) override;
virtual void EmitConstantPool() override {
void EmitConstantPool() override {
// we emit constant pools customly!
}
virtual void EmitFunctionBodyEnd() override;
virtual void EmitFunctionEntryLabel() override;
virtual void EmitStartOfAsmFile(Module &M) override;
virtual void EmitEndOfAsmFile(Module &M) override;
virtual void EmitXXStructor(const Constant *CV) override;
void EmitFunctionBodyEnd() override;
void EmitFunctionEntryLabel() override;
void EmitStartOfAsmFile(Module &M) override;
void EmitEndOfAsmFile(Module &M) override;
void EmitXXStructor(const Constant *CV) override;
// lowerOperand - Convert a MachineOperand into the equivalent MCOperand.
bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp);
@ -97,7 +97,7 @@ private:
const MachineInstr *MI);
public:
virtual unsigned getISAEncoding() override {
unsigned getISAEncoding() override {
// ARM/Darwin adds ISA to the DWARF info for each function.
if (!Subtarget->isTargetMachO())
return 0;
@ -116,8 +116,7 @@ private:
public:
/// EmitMachineConstantPoolValue - Print a machine constantpool value to
/// the .s file.
virtual void
EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) override;
void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) override;
};
} // end namespace llvm

5
llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
View File

@ -29,9 +29,8 @@ namespace {
X86WinCOFFObjectWriter(bool Is64Bit_);
virtual ~X86WinCOFFObjectWriter();
virtual unsigned getRelocType(const MCValue &Target,
const MCFixup &Fixup,
bool IsCrossSection) const override;
unsigned getRelocType(const MCValue &Target, const MCFixup &Fixup,
bool IsCrossSection) const override;
};
}

22
llvm/lib/Target/X86/X86AsmPrinter.h
View File

@ -33,26 +33,26 @@ class LLVM_LIBRARY_VISIBILITY X86AsmPrinter : public AsmPrinter {
Subtarget = &TM.getSubtarget<X86Subtarget>();
}
virtual const char *getPassName() const override {
const char *getPassName() const override {
return "X86 Assembly / Object Emitter";
}
const X86Subtarget &getSubtarget() const { return *Subtarget; }
virtual void EmitStartOfAsmFile(Module &M) override;
void EmitStartOfAsmFile(Module &M) override;
virtual void EmitEndOfAsmFile(Module &M) override;
void EmitEndOfAsmFile(Module &M) override;
virtual void EmitInstruction(const MachineInstr *MI) override;
void EmitInstruction(const MachineInstr *MI) override;
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &OS) override;
virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &OS) override;
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &OS) override;
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &OS) override;
virtual bool runOnMachineFunction(MachineFunction &F) override;
bool runOnMachineFunction(MachineFunction &F) override;
};
} // end namespace llvm

58
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
View File

@ -52,11 +52,11 @@ public:
initializeX86TTIPass(*PassRegistry::getPassRegistry());
}
virtual void initializePass() override {
void initializePass() override {
pushTTIStack(this);
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const override {
void getAnalysisUsage(AnalysisUsage &AU) const override {
TargetTransformInfo::getAnalysisUsage(AU);
}
@ -64,7 +64,7 @@ public:
static char ID;
/// Provide necessary pointer adjustments for the two base classes.
virtual void *getAdjustedAnalysisPointer(const void *ID) override {
void *getAdjustedAnalysisPointer(const void *ID) override {
if (ID == &TargetTransformInfo::ID)
return (TargetTransformInfo*)this;
return this;
@ -72,43 +72,41 @@ public:
/// \name Scalar TTI Implementations
/// @{
virtual PopcntSupportKind getPopcntSupport(unsigned TyWidth) const override;
PopcntSupportKind getPopcntSupport(unsigned TyWidth) const override;
/// @}
/// \name Vector TTI Implementations
/// @{
virtual unsigned getNumberOfRegisters(bool Vector) const override;
virtual unsigned getRegisterBitWidth(bool Vector) const override;
virtual unsigned getMaximumUnrollFactor() const override;
virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty,
OperandValueKind,
OperandValueKind) const override;
virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
int Index, Type *SubTp) const override;
virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
Type *Src) const override;
virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
Type *CondTy) const override;
virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
unsigned Index) const override;
virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
unsigned Alignment,
unsigned AddressSpace) const override;
unsigned getNumberOfRegisters(bool Vector) const override;
unsigned getRegisterBitWidth(bool Vector) const override;
unsigned getMaximumUnrollFactor() const override;
unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind,
OperandValueKind) const override;
unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
int Index, Type *SubTp) const override;
unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
Type *Src) const override;
unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
Type *CondTy) const override;
unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
unsigned Index) const override;
unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
unsigned AddressSpace) const override;
virtual unsigned
getAddressComputationCost(Type *PtrTy, bool IsComplex) const override;
unsigned getAddressComputationCost(Type *PtrTy,
bool IsComplex) const override;
virtual unsigned getReductionCost(unsigned Opcode, Type *Ty,
bool IsPairwiseForm) const override;
unsigned getReductionCost(unsigned Opcode, Type *Ty,
bool IsPairwiseForm) const override;
virtual unsigned getIntImmCost(const APInt &Imm, Type *Ty) const override;
unsigned getIntImmCost(const APInt &Imm, Type *Ty) const override;
virtual unsigned getIntImmCost(unsigned Opcode, const APInt &Imm,
Type *Ty) const override;
virtual unsigned getIntImmCost(Intrinsic::ID IID, const APInt &Imm,
Type *Ty) const override;
unsigned getIntImmCost(unsigned Opcode, const APInt &Imm,
Type *Ty) const override;
unsigned getIntImmCost(Intrinsic::ID IID, const APInt &Imm,
Type *Ty) const override;
/// @}
};