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Revert r137114 

llvm-svn: 137127
This commit is contained in:
Bruno Cardoso Lopes 2011-08-09 17:39:01 +00:00
parent f481ccafd8
commit 24dd1d4a27
2 changed files with 1 additions and 28 deletions
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22
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -969,9 +969,6 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
setOperationAction(ISD::SINT_TO_FP, MVT::v8i32, Legal);
setOperationAction(ISD::FP_ROUND, MVT::v4f32, Legal);
// sint_to_fp between different vector types needs custom handling
setOperationAction(ISD::SINT_TO_FP, MVT::v4i32, Custom);
setOperationAction(ISD::CONCAT_VECTORS, MVT::v4f64, Custom);
setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i64, Custom);
setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f32, Custom);
@ -7081,24 +7078,6 @@ SDValue X86TargetLowering::LowerShiftParts(SDValue Op, SelectionDAG &DAG) const
SDValue X86TargetLowering::LowerSINT_TO_FP(SDValue Op,
SelectionDAG &DAG) const {
EVT SrcVT = Op.getOperand(0).getValueType();
EVT DstVT = Op.getValueType();
DebugLoc dl = Op.getDebugLoc();
if (SrcVT.isVector() && DstVT.isVector()) {
unsigned SrcVTSize = SrcVT.getSizeInBits();
unsigned DstVTSize = DstVT.getSizeInBits();
// Support directly by the target
if (SrcVTSize == DstVTSize)
return Op;
// Handle v4f64 = sitofp v4i32
if (DstVT != MVT::v4f64 && SrcVT != MVT::v4i32)
return SDValue();
SDValue V = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Op.getOperand(0));
return DAG.getNode(ISD::FP_EXTEND, dl, DstVT, V);
}
if (SrcVT.isVector())
return SDValue();
@ -7115,6 +7094,7 @@ SDValue X86TargetLowering::LowerSINT_TO_FP(SDValue Op,
return Op;
}
DebugLoc dl = Op.getDebugLoc();
unsigned Size = SrcVT.getSizeInBits()/8;
MachineFunction &MF = DAG.getMachineFunction();
int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size, false);

7
llvm/test/CodeGen/X86/avx-cvt.ll
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@ -6,13 +6,6 @@ define <8 x float> @sitofp00(<8 x i32> %a) nounwind {
ret <8 x float> %b
}
; CHECK: vcvtdq2ps
; CHECK-NEXT: vcvtps2pd
define <4 x double> @sitofp01(<4 x i32> %a) {
%b = sitofp <4 x i32> %a to <4 x double>
ret <4 x double> %b
}
; CHECK: vcvttps2dq %ymm
define <8 x i32> @fptosi00(<8 x float> %a) nounwind {
%b = fptosi <8 x float> %a to <8 x i32>