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Move MRI liveouts to MBlaze return instructions. 

llvm-svn: 174408
This commit is contained in:
Jakob Stoklund Olesen 2013-02-05 18:08:45 +00:00
parent 0af477c3b1
commit 242546c99d
2 changed files with 17 additions and 19 deletions
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32
llvm/lib/Target/MBlaze/MBlazeISelLowering.cpp
View File

@ -1028,15 +1028,17 @@ LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
// Analize return values. // Analize return values.
CCInfo.AnalyzeReturn(Outs, RetCC_MBlaze); CCInfo.AnalyzeReturn(Outs, RetCC_MBlaze);
// If this is the first return lowered for this function, add
// the regs to the liveout set for the function.
if (DAG.getMachineFunction().getRegInfo().liveout_empty()) {
for (unsigned i = 0; i != RVLocs.size(); ++i)
if (RVLocs[i].isRegLoc())
DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg());
}
SDValue Flag; SDValue Flag;
SmallVector<SDValue, 4> RetOps(1, Chain);
// If this function is using the interrupt_handler calling convention
// then use "rtid r14, 0" otherwise use "rtsd r15, 8"
unsigned Ret = (CallConv == CallingConv::MBLAZE_INTR) ? MBlazeISD::IRet
: MBlazeISD::Ret;
unsigned Reg = (CallConv == CallingConv::MBLAZE_INTR) ? MBlaze::R14
: MBlaze::R15;
RetOps.push_back(DAG.getRegister(Reg, MVT::i32));
// Copy the result values into the output registers. // Copy the result values into the output registers.
for (unsigned i = 0; i != RVLocs.size(); ++i) { for (unsigned i = 0; i != RVLocs.size(); ++i) {
@ -1049,20 +1051,16 @@ LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
// guarantee that all emitted copies are // guarantee that all emitted copies are
// stuck together, avoiding something bad // stuck together, avoiding something bad
Flag = Chain.getValue(1); Flag = Chain.getValue(1);
RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
} }
// If this function is using the interrupt_handler calling convention RetOps[0] = Chain; // Update chain.
// then use "rtid r14, 0" otherwise use "rtsd r15, 8"
unsigned Ret = (CallConv == CallingConv::MBLAZE_INTR) ? MBlazeISD::IRet
: MBlazeISD::Ret;
unsigned Reg = (CallConv == CallingConv::MBLAZE_INTR) ? MBlaze::R14
: MBlaze::R15;
SDValue DReg = DAG.getRegister(Reg, MVT::i32);
// Add the flag if we have it.
if (Flag.getNode()) if (Flag.getNode())
return DAG.getNode(Ret, dl, MVT::Other, Chain, DReg, Flag); RetOps.push_back(Flag);
return DAG.getNode(Ret, dl, MVT::Other, Chain, DReg); return DAG.getNode(Ret, dl, MVT::Other, &RetOps[0], RetOps.size());
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//

4
llvm/lib/Target/MBlaze/MBlazeInstrInfo.td
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@ -28,9 +28,9 @@ def SDT_MBCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def MBlazeRet : SDNode<"MBlazeISD::Ret", SDT_MBlazeRet, def MBlazeRet : SDNode<"MBlazeISD::Ret", SDT_MBlazeRet,
[SDNPHasChain, SDNPOptInGlue]>; [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
def MBlazeIRet : SDNode<"MBlazeISD::IRet", SDT_MBlazeIRet, def MBlazeIRet : SDNode<"MBlazeISD::IRet", SDT_MBlazeIRet,
[SDNPHasChain, SDNPOptInGlue]>; [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
def MBlazeJmpLink : SDNode<"MBlazeISD::JmpLink",SDT_MBlazeJmpLink, def MBlazeJmpLink : SDNode<"MBlazeISD::JmpLink",SDT_MBlazeJmpLink,
[SDNPHasChain,SDNPOptInGlue,SDNPOutGlue, [SDNPHasChain,SDNPOptInGlue,SDNPOutGlue,