Add a 'pattern' arg to the ARM PseudoNeonI class.

llvm-svn: 115831
This commit is contained in:
Jim Grosbach 2010-10-06 20:36:55 +00:00
parent e535b01a74
commit 233b3a2f95
2 changed files with 9 additions and 7 deletions

View File

@ -1550,11 +1550,13 @@ class PseudoNLdSt<dag oops, dag iops, InstrItinClass itin, string cstr>
list<Predicate> Predicates = [HasNEON];
}
class PseudoNeonI<dag oops, dag iops, InstrItinClass itin, string cstr>
class PseudoNeonI<dag oops, dag iops, InstrItinClass itin, string cstr,
list<dag> pattern>
: InstARM<AddrModeNone, Size4Bytes, IndexModeNone, Pseudo, NeonDomain, cstr,
itin> {
let OutOperandList = oops;
let InOperandList = !con(iops, (ins pred:$p));
let Pattern = pattern;
list<Predicate> Predicates = [HasNEON];
}

View File

@ -3816,11 +3816,11 @@ def VTBL4
} // hasExtraSrcRegAllocReq = 1
def VTBL2Pseudo
: PseudoNeonI<(outs DPR:$dst), (ins QPR:$tbl, DPR:$src), IIC_VTB2, "">;
: PseudoNeonI<(outs DPR:$dst), (ins QPR:$tbl, DPR:$src), IIC_VTB2, "", []>;
def VTBL3Pseudo
: PseudoNeonI<(outs DPR:$dst), (ins QQPR:$tbl, DPR:$src), IIC_VTB3, "">;
: PseudoNeonI<(outs DPR:$dst), (ins QQPR:$tbl, DPR:$src), IIC_VTB3, "", []>;
def VTBL4Pseudo
: PseudoNeonI<(outs DPR:$dst), (ins QQPR:$tbl, DPR:$src), IIC_VTB4, "">;
: PseudoNeonI<(outs DPR:$dst), (ins QQPR:$tbl, DPR:$src), IIC_VTB4, "", []>;
// VTBX : Vector Table Extension
def VTBX1
@ -3849,13 +3849,13 @@ def VTBX4
def VTBX2Pseudo
: PseudoNeonI<(outs DPR:$dst), (ins DPR:$orig, QPR:$tbl, DPR:$src),
IIC_VTBX2, "$orig = $dst">;
IIC_VTBX2, "$orig = $dst", []>;
def VTBX3Pseudo
: PseudoNeonI<(outs DPR:$dst), (ins DPR:$orig, QQPR:$tbl, DPR:$src),
IIC_VTBX3, "$orig = $dst">;
IIC_VTBX3, "$orig = $dst", []>;
def VTBX4Pseudo
: PseudoNeonI<(outs DPR:$dst), (ins DPR:$orig, QQPR:$tbl, DPR:$src),
IIC_VTBX4, "$orig = $dst">;
IIC_VTBX4, "$orig = $dst", []>;
//===----------------------------------------------------------------------===//
// NEON instructions for single-precision FP math