[X86][X87] Fix issue with sitofp i64 -> fp128 on 32-bit targets
Fix for PR27726 - sitofp i64 to fp128 was loading the merged load i64 to a x87 register preventing legalization for conversion to fp128. Added 32-bit tests for fp128 cast/conversions. llvm-svn: 273210
This commit is contained in:
Simon Pilgrim
parent
61ddbdcd02
commit
225b2e37a0
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@ -30035,8 +30035,8 @@ static SDValue combineSIntToFP(SDNode *N, SelectionDAG &DAG,
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LoadSDNode *Ld = cast<LoadSDNode>(Op0.getNode());
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EVT LdVT = Ld->getValueType(0);
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// This transformation is not supported if the result type is f16
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if (VT == MVT::f16)
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// This transformation is not supported if the result type is f16 or f128.
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if (VT == MVT::f16 || VT == MVT::f128)
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return SDValue();
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if (!Ld->isVolatile() && !VT.isVector() &&
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@ -1,5 +1,6 @@
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx | FileCheck %s
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx | FileCheck %s
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -O2 -mtriple=i686-linux-gnu -mattr=+mmx | FileCheck %s --check-prefix=X32
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; Check soft floating point conversion function calls.
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@ -17,11 +18,17 @@ entry:
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%conv = fpext float %0 to fp128
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store fp128 %conv, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: TestFPExtF32_F128:
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; CHECK: movss vf32(%rip), %xmm0
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; CHECK-NEXT: callq __extendsftf2
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; CHECK-NEXT: movaps %xmm0, vf128(%rip)
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; CHECK: retq
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; X32-LABEL: TestFPExtF32_F128:
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; X32: flds vf32
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; X32: fstps
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; X32: calll __extendsftf2
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; X32: retl
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;
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; X64-LABEL: TestFPExtF32_F128:
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; X64: movss vf32(%rip), %xmm0
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; X64-NEXT: callq __extendsftf2
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; X64-NEXT: movaps %xmm0, vf128(%rip)
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; X64: retq
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}
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define void @TestFPExtF64_F128() {
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@ -30,11 +37,17 @@ entry:
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%conv = fpext double %0 to fp128
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store fp128 %conv, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: TestFPExtF64_F128:
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; CHECK: movsd vf64(%rip), %xmm0
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; CHECK-NEXT: callq __extenddftf2
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; CHECK-NEXT: movapd %xmm0, vf128(%rip)
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; CHECK: ret
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; X32-LABEL: TestFPExtF64_F128:
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; X32: fldl vf64
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; X32: fstpl
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; X32: calll __extenddftf2
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; X32: retl
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;
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; X64-LABEL: TestFPExtF64_F128:
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; X64: movsd vf64(%rip), %xmm0
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; X64-NEXT: callq __extenddftf2
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; X64-NEXT: movapd %xmm0, vf128(%rip)
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; X64: ret
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}
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define void @TestFPToSIF128_I32() {
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@ -43,11 +56,15 @@ entry:
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%conv = fptosi fp128 %0 to i32
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store i32 %conv, i32* @vi32, align 4
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ret void
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; CHECK-LABEL: TestFPToSIF128_I32:
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; CHECK: movaps vf128(%rip), %xmm0
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; CHECK-NEXT: callq __fixtfsi
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; CHECK-NEXT: movl %eax, vi32(%rip)
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; CHECK: retq
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; X32-LABEL: TestFPToSIF128_I32:
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; X32: calll __fixtfsi
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; X32: retl
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;
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; X64-LABEL: TestFPToSIF128_I32:
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; X64: movaps vf128(%rip), %xmm0
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; X64-NEXT: callq __fixtfsi
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; X64-NEXT: movl %eax, vi32(%rip)
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; X64: retq
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}
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define void @TestFPToUIF128_U32() {
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@ -56,11 +73,15 @@ entry:
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%conv = fptoui fp128 %0 to i32
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store i32 %conv, i32* @vu32, align 4
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ret void
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; CHECK-LABEL: TestFPToUIF128_U32:
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; CHECK: movaps vf128(%rip), %xmm0
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; CHECK-NEXT: callq __fixunstfsi
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; CHECK-NEXT: movl %eax, vu32(%rip)
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; CHECK: retq
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; X32-LABEL: TestFPToUIF128_U32:
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; X32: calll __fixunstfsi
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; X32: retl
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;
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; X64-LABEL: TestFPToUIF128_U32:
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; X64: movaps vf128(%rip), %xmm0
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; X64-NEXT: callq __fixunstfsi
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; X64-NEXT: movl %eax, vu32(%rip)
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; X64: retq
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}
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define void @TestFPToSIF128_I64() {
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@ -70,12 +91,16 @@ entry:
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%conv1 = sext i32 %conv to i64
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store i64 %conv1, i64* @vi64, align 8
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ret void
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; CHECK-LABEL: TestFPToSIF128_I64:
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; CHECK: movaps vf128(%rip), %xmm0
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; CHECK-NEXT: callq __fixtfsi
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; CHECK-NEXT: cltq
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; CHECK-NEXT: movq %rax, vi64(%rip)
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; CHECK: retq
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; X32-LABEL: TestFPToSIF128_I64:
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; X32: calll __fixtfsi
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; X32: retl
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;
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; X64-LABEL: TestFPToSIF128_I64:
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; X64: movaps vf128(%rip), %xmm0
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; X64-NEXT: callq __fixtfsi
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; X64-NEXT: cltq
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; X64-NEXT: movq %rax, vi64(%rip)
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; X64: retq
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}
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define void @TestFPToUIF128_U64() {
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@ -85,12 +110,16 @@ entry:
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%conv1 = zext i32 %conv to i64
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store i64 %conv1, i64* @vu64, align 8
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ret void
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; CHECK-LABEL: TestFPToUIF128_U64:
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; CHECK: movaps vf128(%rip), %xmm0
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; CHECK-NEXT: callq __fixunstfsi
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; CHECK-NEXT: movl %eax, %eax
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; CHECK-NEXT: movq %rax, vu64(%rip)
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; CHECK: retq
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; X32-LABEL: TestFPToUIF128_U64:
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; X32: calll __fixunstfsi
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; X32: retl
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;
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; X64-LABEL: TestFPToUIF128_U64:
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; X64: movaps vf128(%rip), %xmm0
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; X64-NEXT: callq __fixunstfsi
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; X64-NEXT: movl %eax, %eax
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; X64-NEXT: movq %rax, vu64(%rip)
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; X64: retq
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}
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define void @TestFPTruncF128_F32() {
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@ -99,11 +128,16 @@ entry:
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%conv = fptrunc fp128 %0 to float
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store float %conv, float* @vf32, align 4
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ret void
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; CHECK-LABEL: TestFPTruncF128_F32:
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; CHECK: movaps vf128(%rip), %xmm0
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; CHECK-NEXT: callq __trunctfsf2
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; CHECK-NEXT: movss %xmm0, vf32(%rip)
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; CHECK: retq
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; X32-LABEL: TestFPTruncF128_F32:
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; X32: calll __trunctfsf2
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; X32: fstps vf32
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; X32: retl
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;
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; X64-LABEL: TestFPTruncF128_F32:
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; X64: movaps vf128(%rip), %xmm0
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; X64-NEXT: callq __trunctfsf2
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; X64-NEXT: movss %xmm0, vf32(%rip)
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; X64: retq
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}
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define void @TestFPTruncF128_F64() {
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@ -112,11 +146,16 @@ entry:
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%conv = fptrunc fp128 %0 to double
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store double %conv, double* @vf64, align 8
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ret void
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; CHECK-LABEL: TestFPTruncF128_F64:
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; CHECK: movapd vf128(%rip), %xmm0
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; CHECK-NEXT: callq __trunctfdf2
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; CHECK-NEXT: movsd %xmm0, vf64(%rip)
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; CHECK: retq
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; X32-LABEL: TestFPTruncF128_F64:
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; X32: calll __trunctfdf2
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; X32: fstpl vf64
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; X32: retl
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;
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; X64-LABEL: TestFPTruncF128_F64:
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; X64: movapd vf128(%rip), %xmm0
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; X64-NEXT: callq __trunctfdf2
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; X64-NEXT: movsd %xmm0, vf64(%rip)
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; X64: retq
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}
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define void @TestSIToFPI32_F128() {
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@ -125,11 +164,15 @@ entry:
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%conv = sitofp i32 %0 to fp128
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store fp128 %conv, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: TestSIToFPI32_F128:
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; CHECK: movl vi32(%rip), %edi
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; CHECK-NEXT: callq __floatsitf
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; CHECK-NEXT: movaps %xmm0, vf128(%rip)
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; CHECK: retq
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; X32-LABEL: TestSIToFPI32_F128:
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; X32: calll __floatsitf
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; X32: retl
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;
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; X64-LABEL: TestSIToFPI32_F128:
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; X64: movl vi32(%rip), %edi
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; X64-NEXT: callq __floatsitf
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; X64-NEXT: movaps %xmm0, vf128(%rip)
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; X64: retq
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}
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define void @TestUIToFPU32_F128() #2 {
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@ -138,11 +181,15 @@ entry:
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%conv = uitofp i32 %0 to fp128
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store fp128 %conv, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: TestUIToFPU32_F128:
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; CHECK: movl vu32(%rip), %edi
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; CHECK-NEXT: callq __floatunsitf
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; CHECK-NEXT: movaps %xmm0, vf128(%rip)
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; CHECK: retq
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; X32-LABEL: TestUIToFPU32_F128:
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; X32: calll __floatunsitf
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; X32: retl
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;
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; X64-LABEL: TestUIToFPU32_F128:
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; X64: movl vu32(%rip), %edi
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; X64-NEXT: callq __floatunsitf
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; X64-NEXT: movaps %xmm0, vf128(%rip)
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; X64: retq
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}
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define void @TestSIToFPI64_F128(){
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@ -151,11 +198,15 @@ entry:
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%conv = sitofp i64 %0 to fp128
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store fp128 %conv, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: TestSIToFPI64_F128:
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; CHECK: movq vi64(%rip), %rdi
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; CHECK-NEXT: callq __floatditf
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; CHECK-NEXT: movaps %xmm0, vf128(%rip)
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; CHECK: retq
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; X32-LABEL: TestSIToFPI64_F128:
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; X32: calll __floatditf
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; X32: retl
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;
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; X64-LABEL: TestSIToFPI64_F128:
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; X64: movq vi64(%rip), %rdi
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; X64-NEXT: callq __floatditf
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; X64-NEXT: movaps %xmm0, vf128(%rip)
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; X64: retq
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}
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define void @TestUIToFPU64_F128() #2 {
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@ -164,11 +215,15 @@ entry:
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%conv = uitofp i64 %0 to fp128
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store fp128 %conv, fp128* @vf128, align 16
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ret void
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; CHECK-LABEL: TestUIToFPU64_F128:
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; CHECK: movq vu64(%rip), %rdi
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; CHECK-NEXT: callq __floatunditf
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; CHECK-NEXT: movaps %xmm0, vf128(%rip)
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; CHECK: retq
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; X32-LABEL: TestUIToFPU64_F128:
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; X32: calll __floatunditf
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; X32: retl
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;
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; X64-LABEL: TestUIToFPU64_F128:
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; X64: movq vu64(%rip), %rdi
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; X64-NEXT: callq __floatunditf
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; X64-NEXT: movaps %xmm0, vf128(%rip)
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; X64: retq
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}
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define i32 @TestConst128(fp128 %v) {
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@ -176,11 +231,15 @@ entry:
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%cmp = fcmp ogt fp128 %v, 0xL00000000000000003FFF000000000000
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: TestConst128:
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; CHECK: movaps {{.*}}, %xmm1
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; CHECK-NEXT: callq __gttf2
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; CHECK-NEXT: test
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; CHECK: retq
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; X32-LABEL: TestConst128:
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; X32: calll __gttf2
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; X32: retl
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;
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; X64-LABEL: TestConst128:
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; X64: movaps {{.*}}, %xmm1
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; X64-NEXT: callq __gttf2
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; X64-NEXT: test
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; X64: retq
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}
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; C code:
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@ -207,17 +266,21 @@ entry:
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%cmp = icmp eq i32 %or, 0
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: TestBits128:
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; CHECK: movaps %xmm0, %xmm1
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; CHECK-NEXT: callq __multf3
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; CHECK-NEXT: movaps %xmm0, (%rsp)
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; CHECK-NEXT: movq (%rsp),
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; CHECK-NEXT: movq %
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; CHECK-NEXT: shrq $32,
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; CHECK: orl
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: movzbl %al, %eax
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; CHECK: retq
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; X32-LABEL: TestBits128:
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; X32: calll __multf3
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; X32: retl
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;
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; X64-LABEL: TestBits128:
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; X64: movaps %xmm0, %xmm1
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; X64-NEXT: callq __multf3
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; X64-NEXT: movaps %xmm0, (%rsp)
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; X64-NEXT: movq (%rsp),
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; X64-NEXT: movq %
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; X64-NEXT: shrq $32,
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; X64: orl
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; X64-NEXT: sete %al
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; X64-NEXT: movzbl %al, %eax
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; X64: retq
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;
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; If TestBits128 fails due to any llvm or clang change,
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; please make sure the original simplified C code will
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@ -244,12 +307,19 @@ entry:
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%add = add i128 %or, 3
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%0 = bitcast i128 %add to fp128
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ret fp128 %0
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; CHECK-LABEL: TestPair128:
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; CHECK: addq $3, %rsi
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; CHECK: movq %rsi, -24(%rsp)
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; CHECK: movq %rdi, -16(%rsp)
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; CHECK: movaps -24(%rsp), %xmm0
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; CHECK-NEXT: retq
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; X32-LABEL: TestPair128:
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; X32: addl
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; X32-NEXT: adcl
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; X32-NEXT: adcl
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; X32-NEXT: adcl
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; X32: retl
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;
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; X64-LABEL: TestPair128:
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; X64: addq $3, %rsi
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; X64: movq %rsi, -24(%rsp)
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; X64: movq %rdi, -16(%rsp)
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; X64: movaps -24(%rsp), %xmm0
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; X64-NEXT: retq
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}
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define fp128 @TestTruncCopysign(fp128 %x, i32 %n) {
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@ -266,12 +336,24 @@ if.then: ; preds = %entry
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cleanup: ; preds = %entry, %if.then
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%retval.0 = phi fp128 [ %conv1, %if.then ], [ %x, %entry ]
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ret fp128 %retval.0
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; CHECK-LABEL: TestTruncCopysign:
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; CHECK: callq __trunctfdf2
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; CHECK-NEXT: andpd {{.*}}, %xmm0
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; CHECK-NEXT: orpd {{.*}}, %xmm0
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; CHECK-NEXT: callq __extenddftf2
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; CHECK: retq
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; X32-LABEL: TestTruncCopysign:
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; X32: calll __trunctfdf2
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; X32: fstpl
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; X32: flds
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; X32: flds
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; X32: fstp
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; X32: fldz
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; X32: fstp
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; X32: fstpl
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; X32: calll __extenddftf2
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; X32: retl
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;
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; X64-LABEL: TestTruncCopysign:
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; X64: callq __trunctfdf2
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; X64-NEXT: andpd {{.*}}, %xmm0
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; X64-NEXT: orpd {{.*}}, %xmm0
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; X64-NEXT: callq __extenddftf2
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; X64: retq
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}
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declare double @copysign(double, double) #1
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