AMDGPU: Add llvm.amdgcn.wqm.vote intrinsic
Reviewers: arsenm, nhaehnle Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye Differential Revision: https://reviews.llvm.org/D38543 llvm-svn: 316426
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@ -747,6 +747,12 @@ def int_amdgcn_wqm : Intrinsic<[llvm_any_ty],
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[LLVMMatchType<0>], [IntrNoMem, IntrSpeculatable]
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>;
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// Return true if at least one thread within the pixel quad passes true into
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// the function.
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def int_amdgcn_wqm_vote : Intrinsic<[llvm_i1_ty],
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[llvm_i1_ty], [IntrNoMem, IntrConvergent]
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>;
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// Copies the active channels of the source value to the destination value,
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// with the guarantee that the source value is computed as if the entire
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// program were executed in Whole Wavefront Mode, i.e. with all channels
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@ -139,7 +139,9 @@ let Defs = [SCC] in {
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[(set i64:$sdst, (not i64:$src0))]
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>;
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def S_WQM_B32 : SOP1_32 <"s_wqm_b32">;
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def S_WQM_B64 : SOP1_64 <"s_wqm_b64">;
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def S_WQM_B64 : SOP1_64 <"s_wqm_b64",
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[(set i1:$sdst, (int_amdgcn_wqm_vote i1:$src0))]
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>;
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} // End Defs = [SCC]
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@ -3532,6 +3532,13 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
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break;
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}
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case Intrinsic::amdgcn_wqm_vote: {
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// wqm_vote is identity when the argument is constant.
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if (!isa<Constant>(II->getArgOperand(0)))
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break;
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return replaceInstUsesWith(*II, II->getArgOperand(0));
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}
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case Intrinsic::stackrestore: {
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// If the save is right next to the restore, remove the restore. This can
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// happen when variable allocas are DCE'd.
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@ -0,0 +1,52 @@
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=CHECK %s
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;CHECK-LABEL: {{^}}ret:
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;CHECK: v_cmp_eq_u32_e32 [[CMP:[^,]+]], v0, v1
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;CHECK: s_wqm_b64 [[WQM:[^,]+]], [[CMP]]
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;CHECK: v_cndmask_b32_e64 v0, 0, 1.0, [[WQM]]
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define amdgpu_ps float @ret(i32 %v0, i32 %v1) #1 {
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main_body:
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%c = icmp eq i32 %v0, %v1
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%w = call i1 @llvm.amdgcn.wqm.vote(i1 %c)
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%r = select i1 %w, float 1.0, float 0.0
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ret float %r
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}
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;CHECK-LABEL: {{^}}true:
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;CHECK: s_wqm_b64
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define amdgpu_ps float @true() #1 {
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main_body:
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%w = call i1 @llvm.amdgcn.wqm.vote(i1 true)
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%r = select i1 %w, float 1.0, float 0.0
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ret float %r
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}
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;CHECK-LABEL: {{^}}false:
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;CHECK: s_wqm_b64
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define amdgpu_ps float @false() #1 {
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main_body:
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%w = call i1 @llvm.amdgcn.wqm.vote(i1 false)
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%r = select i1 %w, float 1.0, float 0.0
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ret float %r
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}
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;CHECK-LABEL: {{^}}kill:
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;CHECK: v_cmp_eq_u32_e32 [[CMP:[^,]+]], v0, v1
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;CHECK: s_wqm_b64 [[WQM:[^,]+]], [[CMP]]
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;FIXME: This could just be: s_and_b64 exec, exec, [[WQM]]
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;CHECK: v_cndmask_b32_e64 [[KILL:[^,]+]], -1.0, 1.0, [[WQM]]
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;CHECK: v_cmpx_le_f32_e32 {{[^,]+}}, 0, [[KILL]]
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;CHECK: s_endpgm
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define amdgpu_ps void @kill(i32 %v0, i32 %v1) #1 {
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main_body:
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%c = icmp eq i32 %v0, %v1
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%w = call i1 @llvm.amdgcn.wqm.vote(i1 %c)
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%r = select i1 %w, float 1.0, float -1.0
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call void @llvm.AMDGPU.kill(float %r)
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ret void
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}
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declare void @llvm.AMDGPU.kill(float) #1
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declare i1 @llvm.amdgcn.wqm.vote(i1)
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attributes #1 = { nounwind }
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@ -1537,4 +1537,37 @@ define i64 @fcmp_constant_to_rhs_olt(float %x) {
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ret i64 %result
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}
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; --------------------------------------------------------------------
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; llvm.amdgcn.wqm.vote
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; --------------------------------------------------------------------
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declare i1 @llvm.amdgcn.wqm.vote(i1)
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; CHECK-LABEL: @wqm_vote_true(
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; CHECK: ret float 1.000000e+00
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define float @wqm_vote_true() {
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main_body:
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%w = call i1 @llvm.amdgcn.wqm.vote(i1 true)
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%r = select i1 %w, float 1.0, float 0.0
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ret float %r
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}
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; CHECK-LABEL: @wqm_vote_false(
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; CHECK: ret float 0.000000e+00
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define float @wqm_vote_false() {
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main_body:
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%w = call i1 @llvm.amdgcn.wqm.vote(i1 false)
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%r = select i1 %w, float 1.0, float 0.0
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ret float %r
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}
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; CHECK-LABEL: @wqm_vote_undef(
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; CHECK: ret float 0.000000e+00
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define float @wqm_vote_undef() {
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main_body:
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%w = call i1 @llvm.amdgcn.wqm.vote(i1 undef)
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%r = select i1 %w, float 1.0, float 0.0
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ret float %r
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}
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; CHECK: attributes #5 = { convergent }
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