From 2076fb28f1801f1fd3981e09014817b0e25b582c Mon Sep 17 00:00:00 2001 From: Alexandre Ganea Date: Tue, 28 May 2019 18:36:35 +0000 Subject: [PATCH] =?UTF-8?q?Fix=20'warning:=20suggest=20explicit=20braces?= =?UTF-8?q?=20to=20avoid=20ambiguous=20=E2=80=98else=E2=80=99=20[-Wdanglin?= =?UTF-8?q?g-else]'=20with=20GCC=207.3?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit See: https://github.com/google/googletest/issues/1119 llvm-svn: 361862 --- .../ARM64/TestArm64InstEmulation.cpp | 30 ++++++++++++------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp b/lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp index 9fc01a432699..d853e6fb43c0 100644 --- a/lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp +++ b/lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp @@ -648,24 +648,34 @@ TEST_F(TestArm64InstEmulation, TestRegisterDoubleSpills) { EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true); EXPECT_EQ(0, row_sp->GetCFAValue().GetOffset()); - if (row_sp->GetRegisterInfo(fpu_d8_arm64, regloc)) + if (row_sp->GetRegisterInfo(fpu_d8_arm64, regloc)) { EXPECT_TRUE(regloc.IsSame()); - if (row_sp->GetRegisterInfo(fpu_d9_arm64, regloc)) + } + if (row_sp->GetRegisterInfo(fpu_d9_arm64, regloc)) { EXPECT_TRUE(regloc.IsSame()); - if (row_sp->GetRegisterInfo(fpu_d10_arm64, regloc)) + } + if (row_sp->GetRegisterInfo(fpu_d10_arm64, regloc)) { EXPECT_TRUE(regloc.IsSame()); - if (row_sp->GetRegisterInfo(fpu_d11_arm64, regloc)) + } + if (row_sp->GetRegisterInfo(fpu_d11_arm64, regloc)) { EXPECT_TRUE(regloc.IsSame()); - if (row_sp->GetRegisterInfo(fpu_d12_arm64, regloc)) + } + if (row_sp->GetRegisterInfo(fpu_d12_arm64, regloc)) { EXPECT_TRUE(regloc.IsSame()); - if (row_sp->GetRegisterInfo(fpu_d13_arm64, regloc)) + } + if (row_sp->GetRegisterInfo(fpu_d13_arm64, regloc)) { EXPECT_TRUE(regloc.IsSame()); - if (row_sp->GetRegisterInfo(fpu_d14_arm64, regloc)) + } + if (row_sp->GetRegisterInfo(fpu_d14_arm64, regloc)) { EXPECT_TRUE(regloc.IsSame()); - if (row_sp->GetRegisterInfo(fpu_d15_arm64, regloc)) + } + if (row_sp->GetRegisterInfo(fpu_d15_arm64, regloc)) { EXPECT_TRUE(regloc.IsSame()); - if (row_sp->GetRegisterInfo(gpr_x27_arm64, regloc)) + } + if (row_sp->GetRegisterInfo(gpr_x27_arm64, regloc)) { EXPECT_TRUE(regloc.IsSame()); - if (row_sp->GetRegisterInfo(gpr_x28_arm64, regloc)) + } + if (row_sp->GetRegisterInfo(gpr_x28_arm64, regloc)) { EXPECT_TRUE(regloc.IsSame()); + } }