replica
/
hanchenye-llvm-project
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Fix 'warning: suggest explicit braces to avoid ambiguous ‘else’ [-Wdangling-else]' with GCC 7.3 

See: https://github.com/google/googletest/issues/1119
llvm-svn: 361862
This commit is contained in:
Alexandre Ganea 2019-05-28 18:36:35 +00:00
parent cf950b46c8
commit 2076fb28f1
1 changed files with 20 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
View File

@ -648,24 +648,34 @@ TEST_F(TestArm64InstEmulation, TestRegisterDoubleSpills) {
EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
EXPECT_EQ(0, row_sp->GetCFAValue().GetOffset());
if (row_sp->GetRegisterInfo(fpu_d8_arm64, regloc))
if (row_sp->GetRegisterInfo(fpu_d8_arm64, regloc)) {
EXPECT_TRUE(regloc.IsSame());
if (row_sp->GetRegisterInfo(fpu_d9_arm64, regloc))
}
if (row_sp->GetRegisterInfo(fpu_d9_arm64, regloc)) {
EXPECT_TRUE(regloc.IsSame());
if (row_sp->GetRegisterInfo(fpu_d10_arm64, regloc))
}
if (row_sp->GetRegisterInfo(fpu_d10_arm64, regloc)) {
EXPECT_TRUE(regloc.IsSame());
if (row_sp->GetRegisterInfo(fpu_d11_arm64, regloc))
}
if (row_sp->GetRegisterInfo(fpu_d11_arm64, regloc)) {
EXPECT_TRUE(regloc.IsSame());
if (row_sp->GetRegisterInfo(fpu_d12_arm64, regloc))
}
if (row_sp->GetRegisterInfo(fpu_d12_arm64, regloc)) {
EXPECT_TRUE(regloc.IsSame());
if (row_sp->GetRegisterInfo(fpu_d13_arm64, regloc))
}
if (row_sp->GetRegisterInfo(fpu_d13_arm64, regloc)) {
EXPECT_TRUE(regloc.IsSame());
if (row_sp->GetRegisterInfo(fpu_d14_arm64, regloc))
}
if (row_sp->GetRegisterInfo(fpu_d14_arm64, regloc)) {
EXPECT_TRUE(regloc.IsSame());
if (row_sp->GetRegisterInfo(fpu_d15_arm64, regloc))
}
if (row_sp->GetRegisterInfo(fpu_d15_arm64, regloc)) {
EXPECT_TRUE(regloc.IsSame());
if (row_sp->GetRegisterInfo(gpr_x27_arm64, regloc))
}
if (row_sp->GetRegisterInfo(gpr_x27_arm64, regloc)) {
EXPECT_TRUE(regloc.IsSame());
if (row_sp->GetRegisterInfo(gpr_x28_arm64, regloc))
}
if (row_sp->GetRegisterInfo(gpr_x28_arm64, regloc)) {
EXPECT_TRUE(regloc.IsSame());
}
}