Remove a fixed item, update a couple partially-fixed items.
llvm-svn: 105375
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Eli Friedman
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a2f74f3c98
commit
1f41303260
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@ -1103,57 +1103,6 @@ be folded into: shl [mem], 1
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//===---------------------------------------------------------------------===//
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This testcase misses a read/modify/write opportunity (from PR1425):
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void vertical_decompose97iH1(int *b0, int *b1, int *b2, int width){
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int i;
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for(i=0; i<width; i++)
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b1[i] += (1*(b0[i] + b2[i])+0)>>0;
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}
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We compile it down to:
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LBB1_2: # bb
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movl (%esi,%edi,4), %ebx
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addl (%ecx,%edi,4), %ebx
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addl (%edx,%edi,4), %ebx
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movl %ebx, (%ecx,%edi,4)
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incl %edi
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cmpl %eax, %edi
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jne LBB1_2 # bb
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the inner loop should add to the memory location (%ecx,%edi,4), saving
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a mov. Something like:
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movl (%esi,%edi,4), %ebx
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addl (%edx,%edi,4), %ebx
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addl %ebx, (%ecx,%edi,4)
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Here is another interesting example:
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void vertical_compose97iH1(int *b0, int *b1, int *b2, int width){
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int i;
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for(i=0; i<width; i++)
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b1[i] -= (1*(b0[i] + b2[i])+0)>>0;
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}
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We miss the r/m/w opportunity here by using 2 subs instead of an add+sub[mem]:
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LBB9_2: # bb
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movl (%ecx,%edi,4), %ebx
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subl (%esi,%edi,4), %ebx
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subl (%edx,%edi,4), %ebx
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movl %ebx, (%ecx,%edi,4)
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incl %edi
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cmpl %eax, %edi
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jne LBB9_2 # bb
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Additionally, LSR should rewrite the exit condition of these loops to use
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a stride-4 IV, would would allow all the scales in the loop to go away.
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This would result in smaller code and more efficient microops.
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//===---------------------------------------------------------------------===//
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In SSE mode, we turn abs and neg into a load from the constant pool plus a xor
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or and instruction, for example:
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@ -1301,15 +1250,8 @@ FirstOnet:
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xorl %eax, %eax
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ret
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There are a few possible improvements here:
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1. We should be able to eliminate the dead load into %ecx
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2. We could change the "movl 8(%esp), %eax" into
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"movzwl 10(%esp), %eax"; this lets us change the cmpl
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into a testl, which is shorter, and eliminate the shift.
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We could also in theory eliminate the branch by using a conditional
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for the address of the load, but that seems unlikely to be worthwhile
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in general.
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We could change the "movl 8(%esp), %eax" into "movzwl 10(%esp), %eax"; this
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lets us change the cmpl into a testl, which is shorter, and eliminate the shift.
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//===---------------------------------------------------------------------===//
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@ -1331,22 +1273,23 @@ bb7: ; preds = %entry
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to:
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_foo:
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foo: # @foo
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# BB#0: # %entry
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movl 4(%esp), %ecx
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cmpb $0, 16(%esp)
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movl 12(%esp), %ecx
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je .LBB0_2
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# BB#1: # %bb
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movl 8(%esp), %eax
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movl 4(%esp), %edx
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je LBB1_2 # bb7
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LBB1_1: # bb
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addl %edx, %eax
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addl %ecx, %eax
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ret
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LBB1_2: # bb7
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movl %edx, %eax
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subl %ecx, %eax
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.LBB0_2: # %bb7
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movl 12(%esp), %edx
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movl %ecx, %eax
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subl %edx, %eax
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ret
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The coalescer could coalesce "edx" with "eax" to avoid the movl in LBB1_2
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if it commuted the addl in LBB1_1.
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There's an obviously unnecessary movl in .LBB0_2, and we could eliminate a
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couple more movls by putting 4(%esp) into %eax instead of %ecx.
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//===---------------------------------------------------------------------===//
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@ -1396,8 +1339,7 @@ Also check why xmm7 is not used at all in the function.
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//===---------------------------------------------------------------------===//
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Legalize loses track of the fact that bools are always zero extended when in
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memory. This causes us to compile abort_gzip (from 164.gzip) from:
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Take the following:
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "i386-apple-darwin8"
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@ -1416,16 +1358,15 @@ bb4.i: ; preds = %entry
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}
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declare void @exit(i32) noreturn nounwind
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into:
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_abort_gzip:
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This compiles into:
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_abort_gzip: ## @abort_gzip
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## BB#0: ## %entry
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subl $12, %esp
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movb _in_exit.4870.b, %al
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notb %al
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testb $1, %al
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jne LBB1_2 ## bb4.i
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LBB1_1: ## bb.i
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...
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cmpb $1, %al
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jne LBB0_2
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We somehow miss folding the movb into the cmpb.
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//===---------------------------------------------------------------------===//
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