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These tests no longer require linear scan because reserved register coalescing is now universal. 

llvm-svn: 128936
This commit is contained in:
Jakob Stoklund Olesen 2011-04-05 21:40:41 +00:00
parent 6aa0fbf4c0
commit 1ec41e2bd9
5 changed files with 14 additions and 19 deletions
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5
llvm/test/CodeGen/ARM/2009-10-27-double-align.ll
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@ -1,6 +1,5 @@
; RUN: llc < %s -mtriple=arm-linux-gnueabi -regalloc=linearscan | FileCheck %s
; This test depends on linear scan's reserved register coalescing.
; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s
; RUN: llc < %s -mtriple=arm-linux-gnueabi -regalloc=basic | FileCheck %s
@.str = private constant [1 x i8] zeroinitializer, align 1

9
llvm/test/CodeGen/ARM/arm-returnaddr.ll
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@ -1,11 +1,10 @@
; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=linearscan | FileCheck %s
; RUN: llc < %s -mtriple=thumbv6-apple-darwin -regalloc=linearscan | FileCheck %s
; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s
; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s
; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=basic | FileCheck %s
; RUN: llc < %s -mtriple=thumbv6-apple-darwin -regalloc=basic | FileCheck %s
; rdar://8015977
; rdar://8020118
; This test needs the reserved register r7 to be coalesced into the ldr.
; So far, only linear scan can do that.
define i8* @rt0(i32 %x) nounwind readnone {
entry:
; CHECK: rt0:

8
llvm/test/CodeGen/Mips/2008-08-06-Alloca.ll
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@ -1,9 +1,5 @@
; RUN: llc < %s -march=mips -regalloc=linearscan | grep {subu.*sp} | count 2
; This test depends on a linearscan optimization, joining copies from reserved
; registers.
; After coalescing, copies from %SP remain.
; They are handled by RALinScan::attemptTrivialCoalescing
; RUN: llc < %s -march=mips | grep {subu.*sp} | count 2
; RUN: llc < %s -march=mips -regalloc=basic | grep {subu.*sp} | count 2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "mipsallegrexel-unknown-psp-elf"

3
llvm/test/CodeGen/PowerPC/2010-05-03-retaddr1.ll
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@ -1,4 +1,5 @@
; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 -regalloc=linearscan | FileCheck %s
; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 | FileCheck %s
; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin -mcpu=g5 -regalloc=basic | FileCheck %s
declare i8* @llvm.frameaddress(i32) nounwind readnone

8
llvm/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll
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@ -1,7 +1,7 @@
;RUN: llc -march=sparc -regalloc=linearscan < %s | FileCheck %s -check-prefix=V8
;RUN: llc -march=sparc -regalloc=linearscan -mattr=v9 < %s | FileCheck %s -check-prefix=V9
; These tests depend on linear scan's trivial coalescer for reserved registers.
;RUN: llc -march=sparc < %s | FileCheck %s -check-prefix=V8
;RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9
;RUN: llc -march=sparc -regalloc=basic < %s | FileCheck %s -check-prefix=V8
;RUN: llc -march=sparc -regalloc=basic -mattr=v9 < %s | FileCheck %s -check-prefix=V9
define i8* @frameaddr() nounwind readnone {
entry: