[BlockGenerator] Generate entry block of regions from instruction lists
The adds code generation support for the previous commit. llvm-svn: 312129
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@ -2202,8 +2202,11 @@ private:
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/// A new statement for @p R will be created and added to the statement vector
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/// and map.
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///
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/// @param R The region we build the statement for.
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/// @param SurroundingLoop The loop the created statement is contained in.
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/// @param R The region we build the statement for.
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/// @param SurroundingLoop The loop the created statement is contained
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/// in.
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/// @param EntryBlockInstructions The (interesting) instructions in the
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/// entry block of the region statement.
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void addScopStmt(Region *R, Loop *SurroundingLoop,
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std::vector<Instruction *> EntryBlockInstructions);
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@ -450,7 +450,12 @@ void BlockGenerator::copyBB(ScopStmt &Stmt, BasicBlock *BB, BasicBlock *CopyBB,
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isl_id_to_ast_expr *NewAccesses) {
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EntryBB = &CopyBB->getParent()->getEntryBlock();
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if (Stmt.isBlockStmt())
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// Block statements and the entry blocks of region statement are code
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// generated from instruction lists. This allow us to optimize the
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// instructions that belong to a certain scop statement. As the code
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// structure of region statements might be arbitrary complex, optimizing the
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// instruction list is not yet supported.
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if (Stmt.isBlockStmt() || (Stmt.isRegionStmt() && Stmt.getEntryBlock() == BB))
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for (Instruction *Inst : Stmt.getInstructions())
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copyInstruction(Stmt, Inst, BBMap, LTS, NewAccesses);
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else
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@ -9,8 +9,15 @@
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; CHECK:polly.stmt.bb3:
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; CHECK-NEXT: %polly.subregion.iv = phi i32 [ %polly.subregion.iv.inc, %polly.stmt.bb5.cont ], [ 0, %polly.stmt.bb3.entry ]
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; CHECK-NEXT: %polly.j.0 = phi i64 [ %j.0.phiops.reload, %polly.stmt.bb3.entry ], [ %p_tmp10, %polly.stmt.bb5.cont ]
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; CHECK-NEXT: %p_tmp = mul nsw i64 %polly.indvar, %polly.indvar
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; CHECK-NEXT: %p_tmp4 = icmp slt i64 %polly.j.0, %p_tmp
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; CHECK-NEXT: %8 = zext i64 %polly.indvar to i65
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; CHECK-NEXT: %9 = add i64 %polly.indvar, -1
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; CHECK-NEXT: %10 = zext i64 %9 to i65
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; CHECK-NEXT: %11 = mul i65 %8, %10
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; CHECK-NEXT: %12 = lshr i65 %11, 1
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; CHECK-NEXT: %13 = trunc i65 %12 to i64
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; CHECK-NEXT: %14 = shl i64 %13, 1
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; CHECK-NEXT: %15 = add i64 %polly.indvar, %14
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; CHECK-NEXT: %p_tmp4 = icmp slt i64 %polly.j.0, %15
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; CHECK-NEXT: %polly.subregion.iv.inc = add i32 %polly.subregion.iv, 1
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; CHECK-NEXT: br i1 %p_tmp4, label %polly.stmt.bb5, label %polly.stmt.bb11.exit
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@ -18,8 +25,8 @@
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; CHECK-NEXT: %p_tmp6 = getelementptr inbounds float, float* %B, i64 42
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; CHECK-NEXT: %tmp7_p_scalar_ = load float, float* %p_tmp6
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; CHECK-NEXT: %p_tmp8 = fadd float %tmp7_p_scalar_, 1.000000e+00
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; CHECK-NEXT: %8 = icmp sle i64 %polly.indvar, 9
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; CHECK-NEXT: %polly.Stmt_bb3__TO__bb11_MayWrite2.cond = icmp ne i1 %8, false
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; CHECK-NEXT: %16 = icmp sle i64 %polly.indvar, 9
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; CHECK-NEXT: %polly.Stmt_bb3__TO__bb11_MayWrite2.cond = icmp ne i1 %16, false
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; CHECK-NEXT: br i1 %polly.Stmt_bb3__TO__bb11_MayWrite2.cond, label %polly.stmt.bb5.Stmt_bb3__TO__bb11_MayWrite2.partial, label %polly.stmt.bb5.cont
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; CHECK:polly.stmt.bb5.Stmt_bb3__TO__bb11_MayWrite2.partial: ; preds = %polly.stmt.bb5
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@ -0,0 +1,47 @@
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; RUN: opt %loadPolly -polly-codegen -S < %s | FileCheck %s
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; CHECK-LABEL: polly.stmt.bb48:
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; CHECK-NEXT: %scevgep = getelementptr i64, i64* %A, i64 %polly.indvar
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; CHECK-NEXT: %tmp51_p_scalar_ = load i64, i64* %scevgep,
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; CHECK-NEXT: %p_tmp52 = and i64 %tmp51_p_scalar_, %tmp26
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; CHECK-NEXT: %p_tmp53 = icmp eq i64 %p_tmp52, %tmp26
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; CHECK-NEXT: store i64 42, i64* %scevgep, align 8
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; CHECK-NEXT: br i1 %p_tmp53, label %polly.stmt.bb54, label %polly.stmt.bb56.exit
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @quux(i32 %arg, i32 %arg1, i64* %A, i64 %tmp9, i64 %tmp24, i64 %tmp14, i64 %tmp22, i64 %tmp44) {
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bb:
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%tmp26 = or i64 %tmp22, %tmp24
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br label %bb39
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bb39: ; preds = %bb39, %bb38
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%tmp45 = icmp eq i64 %tmp44, %tmp9
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br i1 %tmp45, label %bb46, label %bb81
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bb46: ; preds = %bb39
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%tmp47 = or i64 1, %tmp14
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br label %bb48
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bb48: ; preds = %bb56, %bb46
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%tmp49 = phi i64 [ 0, %bb46 ], [ %tmp57, %bb56 ]
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%tmp50 = getelementptr inbounds i64, i64* %A, i64 %tmp49
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%tmp51 = load i64, i64* %tmp50, align 8
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%tmp52 = and i64 %tmp51, %tmp26
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%tmp53 = icmp eq i64 %tmp52, %tmp26
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store i64 42, i64* %tmp50, align 8
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br i1 %tmp53, label %bb54, label %bb56
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bb54: ; preds = %bb48
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%tmp55 = xor i64 %tmp51, %tmp47
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store i64 %tmp55, i64* %tmp50, align 8
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br label %bb56
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bb56: ; preds = %bb54, %bb48
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%tmp57 = add nuw nsw i64 %tmp49, 1
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%tmp58 = icmp eq i64 %tmp57, %tmp9
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br i1 %tmp58, label %bb81, label %bb48
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bb81: ; preds = %bb74, %bb56
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ret void
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}
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