replica
/
hanchenye-llvm-project
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

STRT and STRBT was incorrectly tagged as IndexModeNone during the refactorings (r119821). 

We now tag them as IndexModePost.

llvm-svn: 128189
This commit is contained in:
Johnny Chen 2011-03-24 01:07:26 +00:00
parent 98766db785
commit 1de8cc6f95
2 changed files with 5 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
llvm/lib/Target/ARM/ARMInstrInfo.td
View File

@ -1805,7 +1805,7 @@ def STRD_POST: AI3stdpo<(outs GPR:$base_wb),
def STRT : AI2stridx<0, 0, (outs GPR:$Rn_wb),
(ins GPR:$Rt, GPR:$Rn,am2offset:$offset),
IndexModeNone, StFrm, IIC_iStore_ru,
IndexModePost, StFrm, IIC_iStore_ru,
"strt", "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb",
[/* For disassembly only; pattern left blank */]> {
let Inst{21} = 1; // overwrite
@ -1813,7 +1813,7 @@ def STRT : AI2stridx<0, 0, (outs GPR:$Rn_wb),
def STRBT : AI2stridx<1, 0, (outs GPR:$Rn_wb),
(ins GPR:$Rt, GPR:$Rn, am2offset:$offset),
IndexModeNone, StFrm, IIC_iStore_bh_ru,
IndexModePost, StFrm, IIC_iStore_bh_ru,
"strbt", "\t$Rt, [$Rn], $offset", "$Rn = $Rn_wb",
[/* For disassembly only; pattern left blank */]> {
let Inst{21} = 1; // overwrite

3
llvm/test/MC/Disassembler/ARM/arm-tests.txt
View File

@ -172,3 +172,6 @@
# CHECK: vldmdb r2, {s7, s8, s9, s10, s11}
0x05 0x3a 0x52 0xed
# CHECK: strtvc r5, [r3], r0, lsr #20
0x30 0x5a 0xa3 0x76