From 1c89ca7295d77b1c83db193dcb398c5eb6fe3105 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 23 Apr 2008 00:38:06 +0000 Subject: [PATCH] Don't do: "(X & 4) >> 1 == 2 --> (X & 4) == 4" if there are more than one uses of the shift result. llvm-svn: 50118 --- .../Scalar/InstructionCombining.cpp | 5 ++-- llvm/test/Transforms/InstCombine/shl-icmp.ll | 29 +++++++++++++++++++ 2 files changed, 32 insertions(+), 2 deletions(-) create mode 100644 llvm/test/Transforms/InstCombine/shl-icmp.ll diff --git a/llvm/lib/Transforms/Scalar/InstructionCombining.cpp b/llvm/lib/Transforms/Scalar/InstructionCombining.cpp index 555942ddc18d..c2019389baee 100644 --- a/llvm/lib/Transforms/Scalar/InstructionCombining.cpp +++ b/llvm/lib/Transforms/Scalar/InstructionCombining.cpp @@ -6065,13 +6065,14 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI, // Otherwise, check to see if the bits shifted out are known to be zero. // If so, we can compare against the unshifted value: // (X & 4) >> 1 == 2 --> (X & 4) == 4. - if (MaskedValueIsZero(LHSI->getOperand(0), + if (LHSI->hasOneUse() && + MaskedValueIsZero(LHSI->getOperand(0), APInt::getLowBitsSet(Comp.getBitWidth(), ShAmtVal))) { return new ICmpInst(ICI.getPredicate(), LHSI->getOperand(0), ConstantExpr::getShl(RHS, ShAmt)); } - if (LHSI->hasOneUse() || RHSV == 0) { + if (LHSI->hasOneUse()) { // Otherwise strength reduce the shift into an and. APInt Val(APInt::getHighBitsSet(TypeBits, TypeBits - ShAmtVal)); Constant *Mask = ConstantInt::get(Val); diff --git a/llvm/test/Transforms/InstCombine/shl-icmp.ll b/llvm/test/Transforms/InstCombine/shl-icmp.ll new file mode 100644 index 000000000000..234c40bf6881 --- /dev/null +++ b/llvm/test/Transforms/InstCombine/shl-icmp.ll @@ -0,0 +1,29 @@ +; RUN: llvm-as < %s | opt -instcombine -stats -disable-output |& \ +; RUN: grep {Number of insts combined} | grep 5 + +define i8 @t1(i8 zeroext %x, i8 zeroext %y) zeroext nounwind { +entry: + %tmp1 = lshr i8 %x, 7 + %cond1 = icmp ne i8 %tmp1, 0 + br i1 %cond1, label %bb1, label %bb2 + +bb1: + ret i8 %tmp1 + +bb2: + %tmp2 = add i8 %tmp1, %y + ret i8 %tmp2 +} + +define i8 @t2(i8 zeroext %x) zeroext nounwind { +entry: + %tmp1 = lshr i8 %x, 7 + %cond1 = icmp ne i8 %tmp1, 0 + br i1 %cond1, label %bb1, label %bb2 + +bb1: + ret i8 0 + +bb2: + ret i8 1 +}