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Cosmetic changes: 

- Comment fixes.
 - Moar whitespace.
 - Made ivars "private" by default.
No functionality change.

llvm-svn: 50926
This commit is contained in:
Bill Wendling 2008-05-10 00:12:52 +00:00
parent 14196c099f
commit 19e3c857b8
1 changed files with 48 additions and 36 deletions
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78
llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
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@ -49,26 +49,31 @@ STATISTIC(NumConvertedTo3Addr, "Number of instructions promoted to 3-address");
STATISTIC(Num3AddrSunk, "Number of 3-address instructions sunk"); STATISTIC(Num3AddrSunk, "Number of 3-address instructions sunk");
namespace { namespace {
struct VISIBILITY_HIDDEN TwoAddressInstructionPass class VISIBILITY_HIDDEN TwoAddressInstructionPass
: public MachineFunctionPass { : public MachineFunctionPass {
const TargetInstrInfo *TII; const TargetInstrInfo *TII;
const TargetRegisterInfo *TRI; const TargetRegisterInfo *TRI;
MachineRegisterInfo *MRI; MachineRegisterInfo *MRI;
LiveVariables *LV; LiveVariables *LV;
bool Sink3AddrInstruction(MachineBasicBlock *MBB, MachineInstr *MI,
unsigned Reg,
MachineBasicBlock::iterator OldPos);
public: public:
static char ID; // Pass identification, replacement for typeid static char ID; // Pass identification, replacement for typeid
TwoAddressInstructionPass() : MachineFunctionPass((intptr_t)&ID) {} TwoAddressInstructionPass() : MachineFunctionPass((intptr_t)&ID) {}
virtual void getAnalysisUsage(AnalysisUsage &AU) const; virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<LiveVariables>();
AU.addPreserved<LiveVariables>();
AU.addPreservedID(MachineLoopInfoID);
AU.addPreservedID(MachineDominatorsID);
AU.addPreservedID(PHIEliminationID);
MachineFunctionPass::getAnalysisUsage(AU);
}
/// runOnMachineFunction - pass entry point /// runOnMachineFunction - Pass entry point.
bool runOnMachineFunction(MachineFunction&); bool runOnMachineFunction(MachineFunction&);
private:
bool Sink3AddrInstruction(MachineBasicBlock *MBB, MachineInstr *MI,
unsigned Reg,
MachineBasicBlock::iterator OldPos);
}; };
char TwoAddressInstructionPass::ID = 0; char TwoAddressInstructionPass::ID = 0;
@ -78,19 +83,11 @@ namespace {
const PassInfo *llvm::TwoAddressInstructionPassID = X.getPassInfo(); const PassInfo *llvm::TwoAddressInstructionPassID = X.getPassInfo();
void TwoAddressInstructionPass::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<LiveVariables>();
AU.addPreserved<LiveVariables>();
AU.addPreservedID(MachineLoopInfoID);
AU.addPreservedID(MachineDominatorsID);
AU.addPreservedID(PHIEliminationID);
MachineFunctionPass::getAnalysisUsage(AU);
}
/// Sink3AddrInstruction - A two-address instruction has been converted to a /// Sink3AddrInstruction - A two-address instruction has been converted to a
/// three-address instruction to avoid clobbering a register. Try to sink it /// three-address instruction to avoid clobbering a register. Try to sink it
/// past the instruction that would kill the above mentioned register to /// past the instruction that would kill the above mentioned register to reduce
/// reduce register pressure. /// register pressure.
///
bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB, bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB,
MachineInstr *MI, unsigned SavedReg, MachineInstr *MI, unsigned SavedReg,
MachineBasicBlock::iterator OldPos) { MachineBasicBlock::iterator OldPos) {
@ -101,6 +98,7 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB,
unsigned DefReg = 0; unsigned DefReg = 0;
SmallSet<unsigned, 4> UseRegs; SmallSet<unsigned, 4> UseRegs;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI->getOperand(i); const MachineOperand &MO = MI->getOperand(i);
if (!MO.isRegister()) if (!MO.isRegister())
@ -123,6 +121,7 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB,
// Find the instruction that kills SavedReg. // Find the instruction that kills SavedReg.
MachineInstr *KillMI = NULL; MachineInstr *KillMI = NULL;
for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(SavedReg), for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(SavedReg),
UE = MRI->use_end(); UI != UE; ++UI) { UE = MRI->use_end(); UI != UE; ++UI) {
MachineOperand &UseMO = UI.getOperand(); MachineOperand &UseMO = UI.getOperand();
@ -131,19 +130,23 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB,
KillMI = UseMO.getParent(); KillMI = UseMO.getParent();
break; break;
} }
if (!KillMI || KillMI->getParent() != MBB) if (!KillMI || KillMI->getParent() != MBB)
return false; return false;
// If any of the definitions are used by another instruction between // If any of the definitions are used by another instruction between the
// the position and the kill use, then it's not safe to sink it. // position and the kill use, then it's not safe to sink it.
// FIXME: This can be sped up if there is an easy way to query whether //
// an instruction if before or after another instruction. Then we can // FIXME: This can be sped up if there is an easy way to query whether an
// use MachineRegisterInfo def / use instead. // instruction if before or after another instruction. Then we can use
// MachineRegisterInfo def / use instead.
MachineOperand *KillMO = NULL; MachineOperand *KillMO = NULL;
MachineBasicBlock::iterator KillPos = KillMI; MachineBasicBlock::iterator KillPos = KillMI;
++KillPos; ++KillPos;
for (MachineBasicBlock::iterator I = next(OldPos); I != KillPos; ++I) { for (MachineBasicBlock::iterator I = next(OldPos); I != KillPos; ++I) {
MachineInstr *OtherMI = I; MachineInstr *OtherMI = I;
for (unsigned i = 0, e = OtherMI->getNumOperands(); i != e; ++i) { for (unsigned i = 0, e = OtherMI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = OtherMI->getOperand(i); MachineOperand &MO = OtherMI->getOperand(i);
if (!MO.isRegister()) if (!MO.isRegister())
@ -153,6 +156,7 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB,
continue; continue;
if (DefReg == MOReg) if (DefReg == MOReg)
return false; return false;
if (MO.isKill()) { if (MO.isKill()) {
if (OtherMI == KillMI && MOReg == SavedReg) if (OtherMI == KillMI && MOReg == SavedReg)
// Save the operand that kills the register. We want unset the kill // Save the operand that kills the register. We want unset the kill
@ -181,8 +185,7 @@ bool TwoAddressInstructionPass::Sink3AddrInstruction(MachineBasicBlock *MBB,
return true; return true;
} }
/// runOnMachineFunction - Reduce two-address instructions to two /// runOnMachineFunction - Reduce two-address instructions to two operands.
/// operands.
/// ///
bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
DOUT << "Machine Function\n"; DOUT << "Machine Function\n";
@ -203,8 +206,8 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
mi != me; ) { mi != me; ) {
MachineBasicBlock::iterator nmi = next(mi); MachineBasicBlock::iterator nmi = next(mi);
const TargetInstrDesc &TID = mi->getDesc(); const TargetInstrDesc &TID = mi->getDesc();
bool FirstTied = true; bool FirstTied = true;
for (unsigned si = 1, e = TID.getNumOperands(); si < e; ++si) { for (unsigned si = 1, e = TID.getNumOperands(); si < e; ++si) {
int ti = TID.getOperandConstraint(si, TOI::TIED_TO); int ti = TID.getOperandConstraint(si, TOI::TIED_TO);
if (ti == -1) if (ti == -1)
@ -214,15 +217,16 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
++NumTwoAddressInstrs; ++NumTwoAddressInstrs;
DOUT << '\t'; DEBUG(mi->print(*cerr.stream(), &TM)); DOUT << '\t'; DEBUG(mi->print(*cerr.stream(), &TM));
} }
FirstTied = false; FirstTied = false;
assert(mi->getOperand(si).isRegister() && mi->getOperand(si).getReg() && assert(mi->getOperand(si).isRegister() && mi->getOperand(si).getReg() &&
mi->getOperand(si).isUse() && "two address instruction invalid"); mi->getOperand(si).isUse() && "two address instruction invalid");
// if the two operands are the same we just remove the use // If the two operands are the same we just remove the use
// and mark the def as def&use, otherwise we have to insert a copy. // and mark the def as def&use, otherwise we have to insert a copy.
if (mi->getOperand(ti).getReg() != mi->getOperand(si).getReg()) { if (mi->getOperand(ti).getReg() != mi->getOperand(si).getReg()) {
// rewrite: // Rewrite:
// a = b op c // a = b op c
// to: // to:
// a = b // a = b
@ -257,9 +261,11 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
assert(mi->getOperand(3-si).isRegister() && assert(mi->getOperand(3-si).isRegister() &&
"Not a proper commutative instruction!"); "Not a proper commutative instruction!");
unsigned regC = mi->getOperand(3-si).getReg(); unsigned regC = mi->getOperand(3-si).getReg();
if (mi->killsRegister(regC)) { if (mi->killsRegister(regC)) {
DOUT << "2addr: COMMUTING : " << *mi; DOUT << "2addr: COMMUTING : " << *mi;
MachineInstr *NewMI = TII->commuteInstruction(mi); MachineInstr *NewMI = TII->commuteInstruction(mi);
if (NewMI == 0) { if (NewMI == 0) {
DOUT << "2addr: COMMUTING FAILED!\n"; DOUT << "2addr: COMMUTING FAILED!\n";
} else { } else {
@ -293,19 +299,22 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
DOUT << "2addr: CONVERTING 2-ADDR: " << *mi; DOUT << "2addr: CONVERTING 2-ADDR: " << *mi;
DOUT << "2addr: TO 3-ADDR: " << *New; DOUT << "2addr: TO 3-ADDR: " << *New;
bool Sunk = false; bool Sunk = false;
if (New->findRegisterUseOperand(regB, false, TRI)) if (New->findRegisterUseOperand(regB, false, TRI))
// FIXME: Temporary workaround. If the new instruction doesn't // FIXME: Temporary workaround. If the new instruction doesn't
// uses regB, convertToThreeAddress must have created more // uses regB, convertToThreeAddress must have created more
// then one instruction. // then one instruction.
Sunk = Sink3AddrInstruction(mbbi, New, regB, mi); Sunk = Sink3AddrInstruction(mbbi, New, regB, mi);
mbbi->erase(mi); // Nuke the old inst. mbbi->erase(mi); // Nuke the old inst.
if (!Sunk) { if (!Sunk) {
mi = New; mi = New;
nmi = next(mi); nmi = next(mi);
} }
++NumConvertedTo3Addr; ++NumConvertedTo3Addr;
// Done with this instruction. break; // Done with this instruction.
break;
} }
} }
} }
@ -317,17 +326,19 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
MachineBasicBlock::iterator prevMi = prior(mi); MachineBasicBlock::iterator prevMi = prior(mi);
DOUT << "\t\tprepend:\t"; DEBUG(prevMi->print(*cerr.stream(), &TM)); DOUT << "\t\tprepend:\t"; DEBUG(prevMi->print(*cerr.stream(), &TM));
// update live variables for regB // Update live variables for regB.
LiveVariables::VarInfo& varInfoB = LV->getVarInfo(regB); LiveVariables::VarInfo& varInfoB = LV->getVarInfo(regB);
// regB is used in this BB. // regB is used in this BB.
varInfoB.UsedBlocks[mbbi->getNumber()] = true; varInfoB.UsedBlocks[mbbi->getNumber()] = true;
if (LV->removeVirtualRegisterKilled(regB, mbbi, mi)) if (LV->removeVirtualRegisterKilled(regB, mbbi, mi))
LV->addVirtualRegisterKilled(regB, prevMi); LV->addVirtualRegisterKilled(regB, prevMi);
if (LV->removeVirtualRegisterDead(regB, mbbi, mi)) if (LV->removeVirtualRegisterDead(regB, mbbi, mi))
LV->addVirtualRegisterDead(regB, prevMi); LV->addVirtualRegisterDead(regB, prevMi);
// replace all occurences of regB with regA // Replace all occurences of regB with regA.
for (unsigned i = 0, e = mi->getNumOperands(); i != e; ++i) { for (unsigned i = 0, e = mi->getNumOperands(); i != e; ++i) {
if (mi->getOperand(i).isRegister() && if (mi->getOperand(i).isRegister() &&
mi->getOperand(i).getReg() == regB) mi->getOperand(i).getReg() == regB)
@ -341,6 +352,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
DOUT << "\t\trewrite to:\t"; DEBUG(mi->print(*cerr.stream(), &TM)); DOUT << "\t\trewrite to:\t"; DEBUG(mi->print(*cerr.stream(), &TM));
} }
mi = nmi; mi = nmi;
} }
} }