[X86] Add a BSWAP16 instruction using the 32-bit encoding plus a 0x66 prefix.

This encoding is recognized by the CPU, but the behavior is undefined. This makes the disassembler handle it correctly so we don't print bswapl with a 16-bit register.

llvm-svn: 330682

llvm/lib/Target/X86/X86InstrInfo.td

@@ -1326,9 +1326,13 @@ def PUSHA16  : I<0x60, RawFrm, (outs), (ins), "pushaw", []>,
 }
 
 let Constraints = "$src = $dst", SchedRW = [WriteALU] in {
+// This instruction is a consequence of BSWAP32r observing operand size. The
+// encoding is valid, but the behavior is undefined.
+let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in
+def BSWAP16r_BAD : I<0xC8, AddRegFrm, (outs GR16:$dst), (ins GR16:$src),
+                     "bswap{w}\t$dst", []>, OpSize16, TB;
 // GR32 = bswap GR32
-def BSWAP32r : I<0xC8, AddRegFrm,
-                 (outs GR32:$dst), (ins GR32:$src),
+def BSWAP32r : I<0xC8, AddRegFrm, (outs GR32:$dst), (ins GR32:$src),
                  "bswap{l}\t$dst",
                  [(set GR32:$dst, (bswap GR32:$src))]>, OpSize32, TB;
 

llvm/test/MC/Disassembler/X86/x86-64.txt

@@ -547,7 +547,7 @@
 # CHECK: tpause %r15
 0x66 0x41 0x0f 0xae 0xf7
 
-# CHECK: bswapl %bx
+# CHECK: bswapw %bx
 0x66 0x0f 0xcb
 
 # CHECK: bswapl %ebx