MachineInstr::isRegTiedTo{Use,Def}Operand can safely be made const.
llvm-svn: 70408
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@ -245,12 +245,12 @@ public:
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/// check if the register def is tied to a source operand, due to either
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/// check if the register def is tied to a source operand, due to either
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/// two-address elimination or inline assembly constraints. Returns the
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/// two-address elimination or inline assembly constraints. Returns the
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/// first tied use operand index by reference is UseOpIdx is not null.
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/// first tied use operand index by reference is UseOpIdx is not null.
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bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx = 0);
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bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx = 0) const;
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/// isRegTiedToDefOperand - Return true if the use operand of the specified
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/// isRegTiedToDefOperand - Return true if the use operand of the specified
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/// index is tied to an def operand. It also returns the def operand index by
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/// index is tied to an def operand. It also returns the def operand index by
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/// reference if DefOpIdx is not null.
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/// reference if DefOpIdx is not null.
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bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx = 0);
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bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx = 0) const;
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/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
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/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
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///
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///
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@ -709,7 +709,8 @@ int MachineInstr::findFirstPredOperandIdx() const {
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/// check if the register def is tied to a source operand, due to either
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/// check if the register def is tied to a source operand, due to either
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/// two-address elimination or inline assembly constraints. Returns the
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/// two-address elimination or inline assembly constraints. Returns the
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/// first tied use operand index by reference is UseOpIdx is not null.
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/// first tied use operand index by reference is UseOpIdx is not null.
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bool MachineInstr::isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx){
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bool MachineInstr::
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isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx) const {
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if (getOpcode() == TargetInstrInfo::INLINEASM) {
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if (getOpcode() == TargetInstrInfo::INLINEASM) {
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assert(DefOpIdx >= 2);
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assert(DefOpIdx >= 2);
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const MachineOperand &MO = getOperand(DefOpIdx);
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const MachineOperand &MO = getOperand(DefOpIdx);
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@ -759,7 +760,8 @@ bool MachineInstr::isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx){
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/// isRegTiedToDefOperand - Return true if the operand of the specified index
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/// isRegTiedToDefOperand - Return true if the operand of the specified index
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/// is a register use and it is tied to an def operand. It also returns the def
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/// is a register use and it is tied to an def operand. It also returns the def
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/// operand index by reference.
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/// operand index by reference.
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bool MachineInstr::isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx){
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bool MachineInstr::
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isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx) const {
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if (getOpcode() == TargetInstrInfo::INLINEASM) {
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if (getOpcode() == TargetInstrInfo::INLINEASM) {
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const MachineOperand &MO = getOperand(UseOpIdx);
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const MachineOperand &MO = getOperand(UseOpIdx);
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if (!MO.isReg() || !MO.isUse() || MO.getReg() == 0)
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if (!MO.isReg() || !MO.isUse() || MO.getReg() == 0)
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