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[AArch64] Add support for NEON scalar absolute value instruction. 

llvm-svn: 192842
This commit is contained in:
Chad Rosier 2013-10-16 21:04:34 +00:00
parent 78bff0505e
commit 175601d997
6 changed files with 61 additions and 8 deletions
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4
llvm/include/llvm/IR/IntrinsicsAArch64.td
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@ -196,4 +196,8 @@ def int_aarch64_neon_vuqadd : Neon_2Arg_Intrinsic;
// Scalar Unsigned Saturating Accumulated of Signed Value
def int_aarch64_neon_vsqadd : Neon_2Arg_Intrinsic;
// Scalar Absolute Value
def int_aarch64_neon_vabs :
Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>;
}

29
llvm/lib/Target/AArch64/AArch64InstrNEON.td
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@ -3245,7 +3245,15 @@ multiclass NeonI_Scalar2SameMisc_SD_size<bit u, bit size_high, bits<5> opcode,
[], NoItinerary>;
}
multiclass NeonI_Scalar2SameMisc_BHSD_size<bit u, bits<5> opcode, string asmop>{
multiclass NeonI_Scalar2SameMisc_D_size<bit u, bits<5> opcode, string asmop> {
def dd: NeonI_Scalar2SameMisc<u, 0b11, opcode,
(outs FPR64:$Rd), (ins FPR64:$Rn),
!strconcat(asmop, " $Rd, $Rn"),
[], NoItinerary>;
}
multiclass NeonI_Scalar2SameMisc_BHSD_size<bit u, bits<5> opcode, string asmop>
: NeonI_Scalar2SameMisc_D_size<u, opcode, asmop> {
def bb : NeonI_Scalar2SameMisc<u, 0b00, opcode,
(outs FPR8:$Rd), (ins FPR8:$Rn),
!strconcat(asmop, " $Rd, $Rn"),
@ -3258,10 +3266,6 @@ multiclass NeonI_Scalar2SameMisc_BHSD_size<bit u, bits<5> opcode, string asmop>{
(outs FPR32:$Rd), (ins FPR32:$Rn),
!strconcat(asmop, " $Rd, $Rn"),
[], NoItinerary>;
def dd: NeonI_Scalar2SameMisc<u, 0b11, opcode,
(outs FPR64:$Rd), (ins FPR64:$Rn),
!strconcat(asmop, " $Rd, $Rn"),
[], NoItinerary>;
}
multiclass NeonI_Scalar2SameMisc_accum_BHSD_size<bit u, bits<5> opcode,
@ -3318,19 +3322,24 @@ class Neon_Scalar2SameMisc_cmpz_D_size_patterns<SDPatternOperator opnode,
: Pat<(v1i64 (opnode (v1i64 VPR64:$Rn), (v1i64 (bitconvert (v8i8 Neon_immAllZeros))))),
(INSTD VPR64:$Rn, 0)>;
multiclass Neon_Scalar2SameMisc_D_size_patterns<SDPatternOperator opnode,
Instruction INSTD> {
def : Pat<(v1i64 (opnode (v1i64 FPR64:$Rn))),
(INSTD FPR64:$Rn)>;
}
multiclass Neon_Scalar2SameMisc_BHSD_size_patterns<SDPatternOperator opnode,
Instruction INSTB,
Instruction INSTH,
Instruction INSTS,
Instruction INSTD> {
Instruction INSTD>
: Neon_Scalar2SameMisc_D_size_patterns<opnode, INSTD> {
def : Pat<(v1i8 (opnode (v1i8 FPR8:$Rn))),
(INSTB FPR8:$Rn)>;
def : Pat<(v1i16 (opnode (v1i16 FPR16:$Rn))),
(INSTH FPR16:$Rn)>;
def : Pat<(v1i32 (opnode (v1i32 FPR32:$Rn))),
(INSTS FPR32:$Rn)>;
def : Pat<(v1i64 (opnode (v1i64 FPR64:$Rn))),
(INSTD FPR64:$Rn)>;
}
multiclass Neon_Scalar2SameMisc_accum_BHSD_size_patterns<
@ -3567,6 +3576,10 @@ def CMLTddi: NeonI_Scalar2SameMisc_cmpz_D_size<0b0, 0b01010, "cmlt">;
def : Neon_Scalar2SameMisc_cmpz_D_size_patterns<int_aarch64_neon_vcltz,
CMLTddi>;
// Scalar Absolute Value
defm ABS : NeonI_Scalar2SameMisc_D_size<0b0, 0b01011, "abs">;
defm : Neon_Scalar2SameMisc_D_size_patterns<int_aarch64_neon_vabs, ABSdd>;
// Scalar Signed Saturating Absolute Value
defm SQABS : NeonI_Scalar2SameMisc_BHSD_size<0b0, 0b00111, "sqabs">;
defm : Neon_Scalar2SameMisc_BHSD_size_patterns<int_arm_neon_vqabs,

12
llvm/test/CodeGen/AArch64/neon-scalar-abs.ll
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@ -1,5 +1,17 @@
; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
define i64 @test_vabsd_s64(i64 %a) {
; CHECK: test_vabsd_s64
; CHECK: abs {{d[0-9]+}}, {{d[0-9]+}}
entry:
%vabs.i = insertelement <1 x i64> undef, i64 %a, i32 0
%vabs1.i = tail call <1 x i64> @llvm.aarch64.neon.vabs(<1 x i64> %vabs.i)
%0 = extractelement <1 x i64> %vabs1.i, i32 0
ret i64 %0
}
declare <1 x i64> @llvm.aarch64.neon.vabs(<1 x i64>)
define i8 @test_vqabsb_s8(i8 %a) {
; CHECK: test_vqabsb_s8
; CHECK: sqabs {{b[0-9]+}}, {{b[0-9]+}}

10
llvm/test/MC/AArch64/neon-diagnostics.s
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@ -4440,3 +4440,13 @@
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR: usqadd d0, b1
// CHECK-ERROR: ^
//----------------------------------------------------------------------
// Scalar Absolute Value
//----------------------------------------------------------------------
abs d29, s24
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR: abs d29, s24
// CHECK-ERROR: ^

8
llvm/test/MC/AArch64/neon-scalar-abs.s
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@ -4,6 +4,14 @@
//----------------------------------------------------------------------
// Scalar Absolute Value
//----------------------------------------------------------------------
abs d29, d24
// CHECK: abs d29, d24 // encoding: [0x1d,0xbb,0xe0,0x5e]
//----------------------------------------------------------------------
// Scalar Signed Saturating Absolute Value
//----------------------------------------------------------------------
sqabs b19, b14

6
llvm/test/MC/Disassembler/AArch64/neon-instructions.txt
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@ -1603,6 +1603,12 @@
#----------------------------------------------------------------------
# Scalar Absolute Value
#----------------------------------------------------------------------
# CHECK: abs d29, d24
0x1d,0xbb,0xe0,0x5e
#----------------------------------------------------------------------
# Scalar Signed Saturating Absolute Value
#----------------------------------------------------------------------
# CHECK: sqabs b19, b14
# CHECK: sqabs h21, h15
# CHECK: sqabs s20, s12