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[X86] AVX512: Allow writemasks with vpcmp 

For now I only updated the _alt variants.  The main variants are used by
codegen and that will need a bit more work to trigger.

<rdar://problem/17492620>

llvm-svn: 212114
This commit is contained in:
Adam Nemet 2014-07-01 18:03:45 +00:00
parent 1efcb90fcd
commit 16de2486cb
2 changed files with 18 additions and 0 deletions
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10
llvm/lib/Target/X86/X86InstrAVX512.td
View File

@ -836,11 +836,21 @@ multiclass avx512_icmp_cc<bits<8> opc, RegisterClass KRC,
!strconcat("vpcmp", Suffix,
"\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}"),
[], IIC_SSE_ALU_F32P_RR>, EVEX_4V;
def rrik_alt : AVX512AIi8<opc, MRMSrcReg,
(outs KRC:$dst), (ins KRC:$mask, RC:$src1, RC:$src2, i8imm:$cc),
!strconcat("vpcmp", Suffix,
"\t{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc}"),
[], IIC_SSE_ALU_F32P_RR>, EVEX_4V, EVEX_K;
def rmi_alt : AVX512AIi8<opc, MRMSrcMem,
(outs KRC:$dst), (ins RC:$src1, x86memop:$src2, i8imm:$cc),
!strconcat("vpcmp", Suffix,
"\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}"),
[], IIC_SSE_ALU_F32P_RM>, EVEX_4V;
def rmik_alt : AVX512AIi8<opc, MRMSrcMem,
(outs KRC:$dst), (ins KRC:$mask, RC:$src1, x86memop:$src2, i8imm:$cc),
!strconcat("vpcmp", Suffix,
"\t{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc}"),
[], IIC_SSE_ALU_F32P_RM>, EVEX_4V, EVEX_K;
}
}

8
llvm/test/MC/X86/avx512-encodings.s
View File

@ -3191,3 +3191,11 @@ vcmpgtps %zmm17, %zmm5, %k2
// CHECK: vcmppd $13
// CHECK: encoding: [0x62,0xd1,0xf5,0x40,0xc2,0x76,0x02,0x0d]
vcmpgepd 0x80(%r14), %zmm17, %k6
// CHECK: vpcmpd $1,
// CHECK: encoding: [0x62,0x93,0x45,0x4c,0x1f,0xe8,0x01]
vpcmpd $1, %zmm24, %zmm7, %k5{%k4}
// CHECK: vpcmpuq $2,
// CHECK: encoding: [0x62,0xf3,0xf5,0x47,0x1e,0x72,0x01,0x02]
vpcmpuq $2, 0x40(%rdx), %zmm17, %k6{%k7}