From 162242b63b46fa309aefb910a59a6c6526341973 Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Sat, 20 Mar 2010 22:20:40 +0000 Subject: [PATCH] pr6652: Use LDM to restore PC to the return address on ARMv4. Patch by John Tytgat! llvm-svn: 99096 --- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 17 +++++++++++------ llvm/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll | 13 +++++++++++++ 2 files changed, 24 insertions(+), 6 deletions(-) create mode 100644 llvm/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index d0a3179b996f..bdbec30d8596 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -1155,19 +1155,24 @@ namespace { }; } -/// MergeReturnIntoLDM - If this is a exit BB, try merging the return op -/// (bx lr) into the preceeding stack restore so it directly restore the value -/// of LR into pc. -/// ldmfd sp!, {r7, lr} +/// MergeReturnIntoLDM - If this is a exit BB, try merging the return ops +/// ("bx lr" and "mov pc, lr") into the preceeding stack restore so it +/// directly restore the value of LR into pc. +/// ldmfd sp!, {..., lr} /// bx lr +/// or +/// ldmfd sp!, {..., lr} +/// mov pc, lr /// => -/// ldmfd sp!, {r7, pc} +/// ldmfd sp!, {..., pc} bool ARMLoadStoreOpt::MergeReturnIntoLDM(MachineBasicBlock &MBB) { if (MBB.empty()) return false; MachineBasicBlock::iterator MBBI = prior(MBB.end()); if (MBBI != MBB.begin() && - (MBBI->getOpcode() == ARM::BX_RET || MBBI->getOpcode() == ARM::tBX_RET)) { + (MBBI->getOpcode() == ARM::BX_RET || + MBBI->getOpcode() == ARM::tBX_RET || + MBBI->getOpcode() == ARM::MOVPCLR)) { MachineInstr *PrevMI = prior(MBBI); if (PrevMI->getOpcode() == ARM::LDM_UPD || PrevMI->getOpcode() == ARM::t2LDM_UPD) { diff --git a/llvm/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll b/llvm/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll new file mode 100644 index 000000000000..31525eff4461 --- /dev/null +++ b/llvm/test/CodeGen/ARM/2010-03-18-ldm-rtrn.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s +; RUN: llc < %s -mtriple=armv5-unknown-eabi | FileCheck %s +; RUN: llc < %s -mtriple=armv6-unknown-eabi | FileCheck %s + +define i32 @bar(i32 %a) nounwind { +entry: + %0 = tail call i32 @foo(i32 %a) nounwind ; [#uses=1] + %1 = add nsw i32 %0, 3 ; [#uses=1] +; CHECK: ldmia sp!, {r11, pc} + ret i32 %1 +} + +declare i32 @foo(i32)