Make sure the instruction right after an inlined function has a
debug location. This solves a problem where range of an inlined subroutine is emitted wrongly. Patch by Manman Ren. Fixes rdar://problem/12415623 llvm-svn: 180140
This commit is contained in:
Adrian Prantl
parent
4341ad3500
commit
15db52bf6d
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@ -758,8 +758,10 @@ bool llvm::InlineFunction(CallSite CS, InlineFunctionInfo &IFI,
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// If the call site was an invoke instruction, add a branch to the normal
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// destination.
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if (InvokeInst *II = dyn_cast<InvokeInst>(TheCall))
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BranchInst::Create(II->getNormalDest(), TheCall);
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if (InvokeInst *II = dyn_cast<InvokeInst>(TheCall)) {
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BranchInst *NewBr = BranchInst::Create(II->getNormalDest(), TheCall);
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NewBr->setDebugLoc(Returns[0]->getDebugLoc());
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}
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// If the return instruction returned a value, replace uses of the call with
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// uses of the returned value.
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@ -787,15 +789,16 @@ bool llvm::InlineFunction(CallSite CS, InlineFunctionInfo &IFI,
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// "starter" and "ender" blocks. How we accomplish this depends on whether
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// this is an invoke instruction or a call instruction.
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BasicBlock *AfterCallBB;
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BranchInst *CreatedBranchToNormalDest = NULL;
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if (InvokeInst *II = dyn_cast<InvokeInst>(TheCall)) {
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// Add an unconditional branch to make this look like the CallInst case...
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BranchInst *NewBr = BranchInst::Create(II->getNormalDest(), TheCall);
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CreatedBranchToNormalDest = BranchInst::Create(II->getNormalDest(), TheCall);
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// Split the basic block. This guarantees that no PHI nodes will have to be
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// updated due to new incoming edges, and make the invoke case more
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// symmetric to the call case.
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AfterCallBB = OrigBB->splitBasicBlock(NewBr,
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AfterCallBB = OrigBB->splitBasicBlock(CreatedBranchToNormalDest,
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CalledFunc->getName()+".exit");
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} else { // It's a call
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@ -874,6 +877,9 @@ bool llvm::InlineFunction(CallSite CS, InlineFunctionInfo &IFI,
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AfterCallBB->getInstList().splice(AfterCallBB->begin(),
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ReturnBB->getInstList());
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if (CreatedBranchToNormalDest)
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CreatedBranchToNormalDest->setDebugLoc(Returns[0]->getDebugLoc());
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// Delete the return instruction now and empty ReturnBB now.
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Returns[0]->eraseFromParent();
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ReturnBB->eraseFromParent();
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@ -0,0 +1,165 @@
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; RUN: opt -inline -S < %s | FileCheck %s
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; Created from source
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; 1 extern int global_var;
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; 2 extern int test_ext(int k);
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; 3 __inline__ __attribute__((always_inline)) int test (int k) {
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; 4 int k2 = test_ext(k);
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; 5 if (k2 > 100)
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; 6 return k2;
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; 7 return 0;
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; 8 }
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; 9
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; 10 int test2() {
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; 11 try
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; 12 {
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; 13 test(global_var);
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; 14 }
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; 15 catch (int e) {
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; 16 global_var = 0;
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; 17 }
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; 18 global_var = 1;
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; 19 return 0;
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; 20 }
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target triple = "x86_64-apple-darwin"
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@_ZTIi = external constant i8*
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@global_var = external global i32
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define i32 @_Z5test2v() #0 {
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entry:
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%exn.slot = alloca i8*
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%ehselector.slot = alloca i32
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%e = alloca i32, align 4
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%0 = load i32* @global_var, align 4, !dbg !11
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%call = invoke i32 @_Z4testi(i32 %0)
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to label %invoke.cont unwind label %lpad, !dbg !11
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; CHECK: _Z4testi.exit:
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; Make sure the branch instruction created during inlining has a debug location
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; CHECK: br label %invoke.cont, !dbg !20
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; The branch instruction has source location of line 8 and its inlined location
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; has source location of line 13.
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; CHECK: !11 = metadata !{i32 13, i32 0, metadata !12, null}
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; CHECK: !20 = metadata !{i32 8, i32 0, metadata !8, metadata !11}
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invoke.cont:
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br label %try.cont, !dbg !13
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lpad:
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%1 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
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catch i8* bitcast (i8** @_ZTIi to i8*), !dbg !11
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%2 = extractvalue { i8*, i32 } %1, 0, !dbg !11
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store i8* %2, i8** %exn.slot, !dbg !11
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%3 = extractvalue { i8*, i32 } %1, 1, !dbg !11
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store i32 %3, i32* %ehselector.slot, !dbg !11
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br label %catch.dispatch, !dbg !11
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catch.dispatch:
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%sel = load i32* %ehselector.slot, !dbg !13
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%4 = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*)) #4, !dbg !13
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%matches = icmp eq i32 %sel, %4, !dbg !13
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br i1 %matches, label %catch, label %eh.resume, !dbg !13
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catch:
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call void @llvm.dbg.declare(metadata !{i32* %e}, metadata !14), !dbg !15
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%exn = load i8** %exn.slot, !dbg !13
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%5 = call i8* @__cxa_begin_catch(i8* %exn) #4, !dbg !13
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%6 = bitcast i8* %5 to i32*, !dbg !13
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%exn.scalar = load i32* %6, !dbg !13
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store i32 %exn.scalar, i32* %e, align 4, !dbg !13
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store i32 0, i32* @global_var, align 4, !dbg !16
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call void @__cxa_end_catch() #4, !dbg !18
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br label %try.cont, !dbg !18
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try.cont:
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store i32 1, i32* @global_var, align 4, !dbg !19
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ret i32 0, !dbg !20
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eh.resume:
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%exn1 = load i8** %exn.slot, !dbg !13
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%sel2 = load i32* %ehselector.slot, !dbg !13
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%lpad.val = insertvalue { i8*, i32 } undef, i8* %exn1, 0, !dbg !13
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%lpad.val3 = insertvalue { i8*, i32 } %lpad.val, i32 %sel2, 1, !dbg !13
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resume { i8*, i32 } %lpad.val3, !dbg !13
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}
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define linkonce_odr i32 @_Z4testi(i32 %k) #1 {
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entry:
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%retval = alloca i32, align 4
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%k.addr = alloca i32, align 4
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%k2 = alloca i32, align 4
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store i32 %k, i32* %k.addr, align 4
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call void @llvm.dbg.declare(metadata !{i32* %k.addr}, metadata !21), !dbg !22
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call void @llvm.dbg.declare(metadata !{i32* %k2}, metadata !23), !dbg !24
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%0 = load i32* %k.addr, align 4, !dbg !24
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%call = call i32 @_Z8test_exti(i32 %0), !dbg !24
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store i32 %call, i32* %k2, align 4, !dbg !24
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%1 = load i32* %k2, align 4, !dbg !25
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%cmp = icmp sgt i32 %1, 100, !dbg !25
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br i1 %cmp, label %if.then, label %if.end, !dbg !25
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if.then:
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%2 = load i32* %k2, align 4, !dbg !26
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store i32 %2, i32* %retval, !dbg !26
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br label %return, !dbg !26
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if.end:
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store i32 0, i32* %retval, !dbg !27
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br label %return, !dbg !27
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return:
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%3 = load i32* %retval, !dbg !28
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ret i32 %3, !dbg !28
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}
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declare i32 @__gxx_personality_v0(...)
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declare i32 @llvm.eh.typeid.for(i8*) #2
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declare void @llvm.dbg.declare(metadata, metadata) #2
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declare i8* @__cxa_begin_catch(i8*)
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declare void @__cxa_end_catch()
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declare i32 @_Z8test_exti(i32) #3
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attributes #0 = { ssp uwtable "target-cpu"="core2" "target-features"="-sse4a,-avx2,-xop,-fma4,-bmi2,-3dnow,-3dnowa,-pclmul,+sse,-avx,-sse41,+ssse3,+mmx,-rtm,-sse42,-lzcnt,-f16c,-popcnt,-bmi,-aes,-fma,-rdrand,+sse2,+sse3" }
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attributes #1 = { alwaysinline inlinehint ssp uwtable "target-cpu"="core2" "target-features"="-sse4a,-avx2,-xop,-fma4,-bmi2,-3dnow,-3dnowa,-pclmul,+sse,-avx,-sse41,+ssse3,+mmx,-rtm,-sse42,-lzcnt,-f16c,-popcnt,-bmi,-aes,-fma,-rdrand,+sse2,+sse3" }
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attributes #2 = { nounwind readnone }
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attributes #3 = { "target-cpu"="core2" "target-features"="-sse4a,-avx2,-xop,-fma4,-bmi2,-3dnow,-3dnowa,-pclmul,+sse,-avx,-sse41,+ssse3,+mmx,-rtm,-sse42,-lzcnt,-f16c,-popcnt,-bmi,-aes,-fma,-rdrand,+sse2,+sse3" }
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attributes #4 = { nounwind }
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!llvm.dbg.cu = !{!0}
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!0 = metadata !{i32 786449, i32 0, i32 4, metadata !"test3.cpp", metadata !"/Users/manmanren/test-Nov/rdar_12415623/unit_test3", metadata !"clang version 3.3 (trunk 176115) (llvm/trunk 176114:176220M)", i1 true, i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !2, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/Users/manmanren/test-Nov/rdar_12415623/unit_test3/test3.cpp] [DW_LANG_C_plus_plus]
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!1 = metadata !{i32 0}
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!2 = metadata !{metadata !3, metadata !8}
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!3 = metadata !{i32 786478, i32 0, metadata !4, metadata !"test2", metadata !"test2", metadata !"_Z5test2v", metadata !4, i32 10, metadata !5, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @_Z5test2v, null, null, metadata !1, i32 10} ; [ DW_TAG_subprogram ] [line 10] [def] [test2]
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!4 = metadata !{i32 786473, metadata !"test3.cpp", metadata !"/Users/manmanren/test-Nov/rdar_12415623/unit_test3", null} ; [ DW_TAG_file_type ]
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!5 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !6, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
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!6 = metadata !{metadata !7}
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!7 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]
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!8 = metadata !{i32 786478, i32 0, metadata !4, metadata !"test", metadata !"test", metadata !"_Z4testi", metadata !4, i32 3, metadata !9, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @_Z4testi, null, null, metadata !1, i32 3} ; [ DW_TAG_subprogram ] [line 3] [def] [test]
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!9 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !10, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
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!10 = metadata !{metadata !7, metadata !7}
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!11 = metadata !{i32 13, i32 0, metadata !12, null}
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!12 = metadata !{i32 786443, metadata !3, i32 12, i32 0, metadata !4, i32 0} ; [ DW_TAG_lexical_block ] [/Users/manmanren/test-Nov/rdar_12415623/unit_test3/test3.cpp]
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!13 = metadata !{i32 14, i32 0, metadata !12, null}
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!14 = metadata !{i32 786688, metadata !3, metadata !"e", metadata !4, i32 15, metadata !7, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [e] [line 15]
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!15 = metadata !{i32 15, i32 0, metadata !3, null}
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!16 = metadata !{i32 16, i32 0, metadata !17, null}
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!17 = metadata !{i32 786443, metadata !3, i32 15, i32 0, metadata !4, i32 1} ; [ DW_TAG_lexical_block ] [/Users/manmanren/test-Nov/rdar_12415623/unit_test3/test3.cpp]
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!18 = metadata !{i32 17, i32 0, metadata !17, null}
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!19 = metadata !{i32 18, i32 0, metadata !3, null}
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!20 = metadata !{i32 19, i32 0, metadata !3, null}
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!21 = metadata !{i32 786689, metadata !8, metadata !"k", metadata !4, i32 16777219, metadata !7, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [k] [line 3]
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!22 = metadata !{i32 3, i32 0, metadata !8, null}
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!23 = metadata !{i32 786688, metadata !8, metadata !"k2", metadata !4, i32 4, metadata !7, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [k2] [line 4]
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!24 = metadata !{i32 4, i32 0, metadata !8, null}
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!25 = metadata !{i32 5, i32 0, metadata !8, null}
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!26 = metadata !{i32 6, i32 0, metadata !8, null}
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!27 = metadata !{i32 7, i32 0, metadata !8, null}
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!28 = metadata !{i32 8, i32 0, metadata !8, null}
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