Sink two variables only used in an assert into the assert itself. Should
fix the release builds with Werror. llvm-svn: 212612
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@ -2413,7 +2413,6 @@ bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned OpNo) {
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SDValue DAGTypeLegalizer::WidenVecOp_ZERO_EXTEND(SDNode *N) {
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SDValue DAGTypeLegalizer::WidenVecOp_ZERO_EXTEND(SDNode *N) {
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SDLoc DL(N);
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SDLoc DL(N);
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EVT VT = N->getValueType(0);
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EVT VT = N->getValueType(0);
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unsigned NumElts = VT.getVectorNumElements();
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SDValue InOp = N->getOperand(0);
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SDValue InOp = N->getOperand(0);
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// If some legalization strategy other than widening is used on the operand,
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// If some legalization strategy other than widening is used on the operand,
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@ -2422,8 +2421,9 @@ SDValue DAGTypeLegalizer::WidenVecOp_ZERO_EXTEND(SDNode *N) {
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if (getTypeAction(InOp.getValueType()) != TargetLowering::TypeWidenVector)
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if (getTypeAction(InOp.getValueType()) != TargetLowering::TypeWidenVector)
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return WidenVecOp_Convert(N);
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return WidenVecOp_Convert(N);
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InOp = GetWidenedVector(InOp);
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InOp = GetWidenedVector(InOp);
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EVT InVT = InOp.getValueType();
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assert(VT.getVectorNumElements() <
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assert(NumElts < InVT.getVectorNumElements() && "Input wasn't widened!");
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InOp.getValueType().getVectorNumElements() &&
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"Input wasn't widened!");
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// Use a special DAG node to represent the operation of zero extending the
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// Use a special DAG node to represent the operation of zero extending the
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// low lanes.
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// low lanes.
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