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Add additional Hi/Lo registers to Clang MipsTargetInfoBase 

Differential Revision: http://reviews.llvm.org/D17378

llvm-svn: 264727
This commit is contained in:
Hrvoje Varga 2016-03-29 12:46:16 +00:00
parent 94c4897e5b
commit 14c42eec54
2 changed files with 14 additions and 1 deletions
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3
clang/lib/Basic/Targets.cpp
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@ -6899,7 +6899,8 @@ public:
"$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
// Hi/lo and condition register names // Hi/lo and condition register names
"hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
"$fcc5","$fcc6","$fcc7", "$fcc5","$fcc6","$fcc7","$ac1hi","$ac1lo","$ac2hi","$ac2lo",
"$ac3hi","$ac3lo",
// MSA register names // MSA register names
"$w0", "$w1", "$w2", "$w3", "$w4", "$w5", "$w6", "$w7", "$w0", "$w1", "$w2", "$w3", "$w4", "$w5", "$w6", "$w7",
"$w8", "$w9", "$w10", "$w11", "$w12", "$w13", "$w14", "$w15", "$w8", "$w9", "$w10", "$w11", "$w12", "$w13", "$w14", "$w15",

12
clang/test/CodeGen/mips-inline-asm.c
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@ -17,3 +17,15 @@ void R () {
asm("lw $1, %0" :: "R"(data)); asm("lw $1, %0" :: "R"(data));
// CHECK: call void asm sideeffect "lw $$1, $0", "*R,~{$1}"(i32* @data) // CHECK: call void asm sideeffect "lw $$1, $0", "*R,~{$1}"(i32* @data)
} }
int additionalClobberedRegisters () {
int temp0;
asm volatile(
"mfhi %[temp0], $ac1 \n\t"
: [temp0]"=&r"(temp0)
:
: "memory", "t0", "t1", "$ac1hi", "$ac1lo", "$ac2hi", "$ac2lo", "$ac3hi", "$ac3lo"
);
return 0;
// CHECK: call i32 asm sideeffect "mfhi $0, $$ac1 \0A\09", "=&r,~{memory},~{$8},~{$9},~{$ac1hi},~{$ac1lo},~{$ac2hi},~{$ac2lo},~{$ac3hi},~{$ac3lo},~{$1}"
}