Disable the load/store optimization pass for Thumb-1.

Moritz's changes have improved codegen a lot, but further testing showed significant correctness problems. Disable by default until these have been worked out.

Patch by Moritz Roth!

llvm-svn: 210789
This commit is contained in:
James Molloy 2014-06-12 15:18:33 +00:00
parent 3d3ea53f32
commit 1417b0be3e
5 changed files with 13 additions and 7 deletions

View File

@ -265,7 +265,8 @@ bool ARMPassConfig::addInstSelector() {
}
bool ARMPassConfig::addPreRegAlloc() {
if (getOptLevel() != CodeGenOpt::None)
// FIXME: Temporarily disabling Thumb-1 pre-RA Load/Store optimization pass
if (getOptLevel() != CodeGenOpt::None && !getARMSubtarget().isThumb1Only())
addPass(createARMLoadStoreOptimizationPass(true));
if (getOptLevel() != CodeGenOpt::None && getARMSubtarget().isCortexA9())
addPass(createMLxExpansionPass());
@ -280,8 +281,11 @@ bool ARMPassConfig::addPreRegAlloc() {
bool ARMPassConfig::addPreSched2() {
if (getOptLevel() != CodeGenOpt::None) {
addPass(createARMLoadStoreOptimizationPass());
printAndVerify("After ARM load / store optimizer");
// FIXME: Temporarily disabling Thumb-1 post-RA Load/Store optimization pass
if (!getARMSubtarget().isThumb1Only()) {
addPass(createARMLoadStoreOptimizationPass());
printAndVerify("After ARM load / store optimizer");
}
if (getARMSubtarget().hasNEON())
addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));

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@ -1,4 +1,5 @@
; RUN: llc < %s -mtriple=thumbv6m-eabi -o - | FileCheck %s
; XFAIL: *
define void @foo(i32* %A) #0 {
entry:

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@ -1,5 +1,5 @@
; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra | FileCheck %s -check-prefix=CHECK -check-prefix=RA_GREEDY
; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra -regalloc=basic | FileCheck %s -check-prefix=CHECK -check-prefix=RA_BASIC
; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra | FileCheck %s
; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra -regalloc=basic | FileCheck %s
%struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* }
%struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* }
@ -45,8 +45,7 @@ define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) {
; CHECK: sub sp, #
; CHECK: mov r[[R0:[0-9]+]], sp
; CHECK: str r{{[0-9+]}}, [r[[R0]]
; RA_GREEDY: str r{{[0-9+]}}, [r[[R0]]
; RA_BASIC: stm r[[R0]]!
; CHECK: str r{{[0-9+]}}, [r[[R0]]
; CHECK-NOT: ldr r0, [sp
; CHECK: mov r[[R1:[0-9]+]], sp
; CHECK: subs r[[R2:[0-9]+]], r[[R1]], r{{[0-9]+}}

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@ -1,4 +1,5 @@
; RUN: llc < %s -mtriple=thumbv6m-eabi -o - | FileCheck %s
; XFAIL: *
@X = external global [0 x i32] ; <[0 x i32]*> [#uses=5]

View File

@ -1,4 +1,5 @@
; RUN: llc -mtriple=thumbv6m-eabi %s -o - | FileCheck %s
; XFAIL: *
@d = external global [64 x i32]
@s = external global [64 x i32]