big endian 32-bit systems (e.g. ppc32) want to return the high reg first, not

the lo-reg first.  This is fallout from my ppc calling conv change yesterday,
it fixes test/ExecutionEngine/2003-05-06-LivenessClobber.llx

llvm-svn: 34983
This commit is contained in:
Chris Lattner 2007-03-06 20:01:06 +00:00
parent db0db9740b
commit 13780ac7db
1 changed files with 5 additions and 0 deletions

View File

@ -1675,6 +1675,11 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
if (Tmp2.getValueType() != MVT::Vector) {
SDOperand Lo, Hi;
ExpandOp(Tmp2, Lo, Hi);
// Big endian systems want the hi reg first.
if (!TLI.isLittleEndian())
std::swap(Lo, Hi);
if (Hi.Val)
Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3, Hi,Tmp3);
else