From 115d2df8a4406959fd0b62b205611bb75773aab3 Mon Sep 17 00:00:00 2001 From: Amara Emerson Date: Fri, 25 Jul 2014 14:03:14 +0000 Subject: [PATCH] [ARM] Emit ABI_PCS_R9_use build attribute. Patch by Ben Foster! Differential Revision: http://reviews.llvm.org/D4657 llvm-svn: 213944 --- llvm/include/llvm/Support/ARMBuildAttributes.h | 6 ++++++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 11 +++++++++++ llvm/test/CodeGen/ARM/build-attributes.ll | 5 +++++ 3 files changed, 22 insertions(+) diff --git a/llvm/include/llvm/Support/ARMBuildAttributes.h b/llvm/include/llvm/Support/ARMBuildAttributes.h index f63e0a61f639..852523fc9bf5 100644 --- a/llvm/include/llvm/Support/ARMBuildAttributes.h +++ b/llvm/include/llvm/Support/ARMBuildAttributes.h @@ -146,6 +146,12 @@ enum { AllowNeon2 = 2, // SIMDv2 was permitted (Half-precision FP, MAC operations) AllowNeonARMv8 = 3, // ARM v8-A SIMD was permitted + // Tag_ABI_PCS_R9_use, (=14), uleb128 + R9IsGPR = 0, // R9 used as v6 (just another callee-saved register) + R9IsSB = 1, // R9 used as a global static base rgister + R9IsTLSPointer = 2, // R9 used as a thread local storage pointer + R9Reserved = 3, // R9 not used by code associated with attributed entity + // Tag_ABI_PCS_RW_data, (=15), uleb128 AddressRWPCRel = 1, // Address RW static data PC-relative AddressRWSBRel = 2, // Address RW static data SB-relative diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp index 9ad808c00e79..0ef72928926e 100644 --- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp @@ -760,6 +760,17 @@ void ARMAsmPrinter::emitAttributes() { } } + // TODO: We currently only support either reserving the register, or treating + // it as another callee-saved register, but not as SB or a TLS pointer; It + // would instead be nicer to push this from the frontend as metadata, as we do + // for the wchar and enum size tags + if (Subtarget->isR9Reserved()) + ATS.emitAttribute(ARMBuildAttrs::ABI_PCS_R9_use, + ARMBuildAttrs::R9Reserved); + else + ATS.emitAttribute(ARMBuildAttrs::ABI_PCS_R9_use, + ARMBuildAttrs::R9IsGPR); + if (Subtarget->hasTrustZone() && Subtarget->hasVirtualization()) ATS.emitAttribute(ARMBuildAttrs::Virtualization_use, ARMBuildAttrs::AllowTZVirtualization); diff --git a/llvm/test/CodeGen/ARM/build-attributes.ll b/llvm/test/CodeGen/ARM/build-attributes.ll index d75d55d0fa68..a4b77c80c104 100644 --- a/llvm/test/CodeGen/ARM/build-attributes.ll +++ b/llvm/test/CodeGen/ARM/build-attributes.ll @@ -38,6 +38,8 @@ ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=default | FileCheck %s --check-prefix=RELOC-OTHER ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi | FileCheck %s --check-prefix=RELOC-OTHER +; RUN: llc < %s -mtriple=arm-none-linux-gnueabi | FileCheck %s --check-prefix=PCS-R9-USE +; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -arm-reserve-r9 | FileCheck %s --check-prefix=PCS-R9-RESERVE ; XSCALE: .eabi_attribute 6, 5 ; XSCALE: .eabi_attribute 8, 1 @@ -463,6 +465,9 @@ ; RELOC-PIC: .eabi_attribute 17, 2 ; RELOC-OTHER: .eabi_attribute 17, 1 +; PCS-R9-USE: .eabi_attribute 14, 0 +; PCS-R9-RESERVE: .eabi_attribute 14, 3 + define i32 @f(i64 %z) { ret i32 0 }