R600: Remove predicated_break inst
We were using two instructions for similar purpose : break and predicated break. Only predicated_break was emitted and it was lowered at R600ControlFlowFinalizer to JUMP;CF_BREAK;POP. This commit simplify the situation by making AMDILCFGStructurizer emit IF_PREDICATE;BREAK;ENDIF; instead of predicated_break (which is now removed). There is no functionality change. llvm-svn: 187510
This commit is contained in:
Vincent Lejeune
parent
48d94c8d76
commit
0c5ed2b437
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@ -251,7 +251,6 @@ protected:
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MachineInstr *getLoopendBlockBranchInstr(MachineBasicBlock *MBB);
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static MachineInstr *getReturnInstr(MachineBasicBlock *MBB);
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static MachineInstr *getContinueInstr(MachineBasicBlock *MBB);
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static MachineInstr *getLoopBreakInstr(MachineBasicBlock *MBB);
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static bool isReturnBlock(MachineBasicBlock *MBB);
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static void cloneSuccessorList(MachineBasicBlock *DstMBB,
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MachineBasicBlock *SrcMBB) ;
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@ -668,16 +667,6 @@ MachineInstr *AMDGPUCFGStructurizer::getContinueInstr(MachineBasicBlock *MBB) {
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return NULL;
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}
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MachineInstr *AMDGPUCFGStructurizer::getLoopBreakInstr(MachineBasicBlock *MBB) {
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for (MachineBasicBlock::iterator It = MBB->begin(); (It != MBB->end());
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++It) {
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MachineInstr *MI = &(*It);
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if (MI->getOpcode() == AMDGPU::PREDICATED_BREAK)
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return MI;
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}
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return NULL;
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}
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bool AMDGPUCFGStructurizer::isReturnBlock(MachineBasicBlock *MBB) {
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MachineInstr *MI = getReturnInstr(MBB);
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bool IsReturn = (MBB->succ_size() == 0);
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@ -1529,26 +1518,8 @@ void AMDGPUCFGStructurizer::mergeLooplandBlock(MachineBasicBlock *DstBlk,
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DEBUG(dbgs() << "loopPattern header = BB" << DstBlk->getNumber()
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<< " land = BB" << LandMBB->getNumber() << "\n";);
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/* we last inserterd the DebugLoc in the
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* BREAK_LOGICALZ_i32 or AMDGPU::BREAK_LOGICALNZ statement in the current
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* dstBlk.
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* search for the DebugLoc in the that statement.
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* if not found, we have to insert the empty/default DebugLoc */
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MachineInstr *LoopBreakInstr = getLoopBreakInstr(DstBlk);
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DebugLoc DLBreak = (LoopBreakInstr) ? LoopBreakInstr->getDebugLoc() :
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DebugLoc();
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insertInstrBefore(DstBlk, AMDGPU::WHILELOOP, DLBreak);
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/* we last inserterd the DebugLoc in the continue statement in the current
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* dstBlk.
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* search for the DebugLoc in the continue statement.
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* if not found, we have to insert the empty/default DebugLoc */
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MachineInstr *ContinueInstr = getContinueInstr(DstBlk);
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DebugLoc DLContinue = (ContinueInstr) ? ContinueInstr->getDebugLoc() :
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DebugLoc();
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insertInstrEnd(DstBlk, AMDGPU::ENDLOOP, DLContinue);
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insertInstrBefore(DstBlk, AMDGPU::WHILELOOP, DebugLoc());
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insertInstrEnd(DstBlk, AMDGPU::ENDLOOP, DebugLoc());
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DstBlk->addSuccessor(LandMBB);
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DstBlk->removeSuccessor(DstBlk);
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}
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@ -1565,7 +1536,9 @@ void AMDGPUCFGStructurizer::mergeLoopbreakBlock(MachineBasicBlock *ExitingMBB,
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MachineBasicBlock::iterator I = BranchMI;
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if (TrueBranch != LandMBB)
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reversePredicateSetter(I);
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insertCondBranchBefore(I, AMDGPU::PREDICATED_BREAK, DL);
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insertCondBranchBefore(ExitingMBB, I, AMDGPU::IF_PREDICATE_SET, AMDGPU::PREDICATE_BIT, DL);
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insertInstrBefore(I, AMDGPU::BREAK);
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insertInstrBefore(I, AMDGPU::ENDIF);
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//now branchInst can be erase safely
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BranchMI->eraseFromParent();
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//now take care of successors, retire blocks
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@ -457,18 +457,11 @@ public:
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MI->eraseFromParent();
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break;
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}
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case AMDGPU::PREDICATED_BREAK: {
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CurrentStack--;
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CfCount += 3;
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BuildMI(MBB, MI, MBB.findDebugLoc(MI), getHWInstrDesc(CF_JUMP))
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.addImm(CfCount)
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.addImm(1);
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case AMDGPU::BREAK: {
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CfCount ++;
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MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
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getHWInstrDesc(CF_LOOP_BREAK))
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.addImm(0);
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BuildMI(MBB, MI, MBB.findDebugLoc(MI), getHWInstrDesc(CF_POP))
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.addImm(CfCount)
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.addImm(1);
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LoopStack.back().second.insert(MIb);
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MI->eraseFromParent();
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break;
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@ -89,21 +89,6 @@ bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) {
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MI.eraseFromParent();
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continue;
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}
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case AMDGPU::BREAK: {
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MachineInstr *PredSet = TII->buildDefaultInstruction(MBB, I,
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AMDGPU::PRED_SETE_INT,
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AMDGPU::PREDICATE_BIT,
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AMDGPU::ZERO,
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AMDGPU::ZERO);
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TII->addFlag(PredSet, 0, MO_FLAG_MASK);
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TII->setImmOperand(PredSet, AMDGPU::OpName::update_exec_mask, 1);
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BuildMI(MBB, I, MBB.findDebugLoc(I),
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TII->get(AMDGPU::PREDICATED_BREAK))
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.addReg(AMDGPU::PREDICATE_BIT);
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MI.eraseFromParent();
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continue;
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}
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case AMDGPU::INTERP_PAIR_XY: {
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MachineInstr *BMI;
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@ -1883,9 +1883,6 @@ def VTX_READ_GLOBAL_128_cm : VTX_READ_128_cm <1,
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def IF_PREDICATE_SET : ILFormat<(outs), (ins GPRI32:$src),
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"IF_PREDICATE_SET $src", []>;
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def PREDICATED_BREAK : ILFormat<(outs), (ins GPRI32:$src),
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"PREDICATED_BREAK $src", []>;
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//===----------------------------------------------------------------------===//
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// Pseudo instructions
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//===----------------------------------------------------------------------===//
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