AMDGPU: Fix crash with invariant markers

The promote alloca pass didn't handle these intrinsics and crashed.
These intrinsics should accept any address space, but for now just
erase them to avoid breaking.

llvm-svn: 258537
This commit is contained in:
Matt Arsenault 2016-01-22 19:47:54 +00:00
parent 585ec8671d
commit 0b783ef076
2 changed files with 33 additions and 0 deletions

View File

@ -412,6 +412,14 @@ void AMDGPUPromoteAlloca::visitAlloca(AllocaInst &I) {
Intr->eraseFromParent();
continue;
}
case Intrinsic::invariant_start:
case Intrinsic::invariant_end:
case Intrinsic::invariant_group_barrier:
Intr->eraseFromParent();
// FIXME: I think the invariant marker should still theoretically apply,
// but the intrinsics need to be changed to accept pointers with any
// address space.
continue;
default:
Intr->dump();
llvm_unreachable("Don't know how to promote alloca intrinsic use.");

View File

@ -0,0 +1,25 @@
; RUN: llc -march=amdgcn -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
declare {}* @llvm.invariant.start(i64, i8* nocapture) #0
declare void @llvm.invariant.end({}*, i64, i8* nocapture) #0
declare i8* @llvm.invariant.group.barrier(i8*) #1
; GCN-LABEL: {{^}}use_invariant_promotable_lds:
; GCN: buffer_load_dword
; GCN: ds_write_b32
define void @use_invariant_promotable_lds(i32 addrspace(1)* %arg) #2 {
bb:
%tmp = alloca i32, align 4
%tmp1 = bitcast i32* %tmp to i8*
%tmp2 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 1
%tmp3 = load i32, i32 addrspace(1)* %tmp2
store i32 %tmp3, i32* %tmp
%tmp4 = call {}* @llvm.invariant.start(i64 4, i8* %tmp1) #0
call void @llvm.invariant.end({}* %tmp4, i64 4, i8* %tmp1) #0
%tmp5 = call i8* @llvm.invariant.group.barrier(i8* %tmp1) #1
ret void
}
attributes #0 = { argmemonly nounwind }
attributes #1 = { nounwind readnone }
attributes #2 = { nounwind }