Map stack based frameindices for spills to zero based indices that can be accessed based on an external symbol defining the location of temporary data for a function. For example: we have spill slots addressed as foo.tmp + 0, foo.tmp + 1 etc.

llvm-svn: 68442
This commit is contained in:
Sanjiv Gupta 2009-04-06 10:54:50 +00:00
parent 56382aa890
commit 0b08df8c09
5 changed files with 62 additions and 33 deletions

View File

@ -343,7 +343,6 @@ bool PIC16AsmPrinter::doFinalization(Module &M) {
void PIC16AsmPrinter::emitFunctionData(MachineFunction &MF) { void PIC16AsmPrinter::emitFunctionData(MachineFunction &MF) {
const Function *F = MF.getFunction(); const Function *F = MF.getFunction();
std::string FuncName = Mang->getValueName(F); std::string FuncName = Mang->getValueName(F);
MachineFrameInfo *MFI= MF.getFrameInfo();
Module *M = const_cast<Module *>(F->getParent()); Module *M = const_cast<Module *>(F->getParent());
const TargetData *TD = TM.getTargetData(); const TargetData *TD = TM.getTargetData();
unsigned FrameSize = 0; unsigned FrameSize = 0;
@ -406,15 +405,7 @@ void PIC16AsmPrinter::emitFunctionData(MachineFunction &MF) {
O << VarName << " RES " << Size << "\n"; O << VarName << " RES " << Size << "\n";
} }
int TempSize = PTLI->GetTmpSize();
// Emit the variable to hold the space for temporary locations if (TempSize > 0 )
// in function frame.
if (MFI->hasStackObjects()) {
int indexBegin = MFI->getObjectIndexBegin();
int indexEnd = MFI->getObjectIndexEnd();
if (indexBegin < indexEnd) {
int TempSize = indexEnd - indexBegin;
O << CurrentFnName << ".tmp RES " << TempSize <<"\n"; O << CurrentFnName << ".tmp RES " << TempSize <<"\n";
}
}
} }

View File

@ -24,11 +24,12 @@
namespace llvm { namespace llvm {
struct VISIBILITY_HIDDEN PIC16AsmPrinter : public AsmPrinter { struct VISIBILITY_HIDDEN PIC16AsmPrinter : public AsmPrinter {
PIC16AsmPrinter(raw_ostream &O, TargetMachine &TM, PIC16AsmPrinter(raw_ostream &O, PIC16TargetMachine &TM,
const TargetAsmInfo *T, bool F, bool V) const TargetAsmInfo *T, bool F, bool V)
: AsmPrinter(O, TM, T, F, V) { : AsmPrinter(O, TM, T, F, V) {
CurBank = ""; CurBank = "";
IsRomData = false; IsRomData = false;
PTLI = TM.getTargetLowering();
} }
private : private :
virtual const char *getPassName() const { virtual const char *getPassName() const {
@ -51,6 +52,7 @@ namespace llvm {
bool doFinalization(Module &M); bool doFinalization(Module &M);
private: private:
PIC16TargetLowering *PTLI;
std::string CurBank; std::string CurBank;
bool IsRomData; bool IsRomData;
}; };

View File

@ -31,7 +31,7 @@ using namespace llvm;
// PIC16TargetLowering Constructor. // PIC16TargetLowering Constructor.
PIC16TargetLowering::PIC16TargetLowering(PIC16TargetMachine &TM) PIC16TargetLowering::PIC16TargetLowering(PIC16TargetMachine &TM)
: TargetLowering(TM) { : TargetLowering(TM), TmpSize(0) {
Subtarget = &TM.getSubtarget<PIC16Subtarget>(); Subtarget = &TM.getSubtarget<PIC16Subtarget>();
@ -154,6 +154,17 @@ static SDValue getOutFlag(SDValue &Op) {
return Flag; return Flag;
} }
// Get the TmpOffset for FrameIndex
unsigned PIC16TargetLowering::GetTmpOffsetForFI(unsigned FI) {
std::map<unsigned, unsigned>::iterator
MapIt = FiTmpOffsetMap.find(FI);
if (MapIt != FiTmpOffsetMap.end())
return MapIt->second;
// This FI (FrameIndex) is not yet mapped, so map it
FiTmpOffsetMap[FI] = TmpSize;
return TmpSize++;
}
// To extract chain value from the SDValue Nodes // To extract chain value from the SDValue Nodes
// This function will help to maintain the chain extracting // This function will help to maintain the chain extracting
@ -541,7 +552,7 @@ PIC16TargetLowering::LegalizeFrameIndex(SDValue Op, SelectionDAG &DAG,
// and non-constant operand of ADD will be treated as pointer. // and non-constant operand of ADD will be treated as pointer.
// Returns the high and lo part of the address, and the offset(in case of ADD). // Returns the high and lo part of the address, and the offset(in case of ADD).
void PIC16TargetLowering:: LegalizeAddress(SDValue Ptr, SelectionDAG &DAG, void PIC16TargetLowering::LegalizeAddress(SDValue Ptr, SelectionDAG &DAG,
SDValue &Lo, SDValue &Hi, SDValue &Lo, SDValue &Hi,
unsigned &Offset, DebugLoc dl) { unsigned &Offset, DebugLoc dl) {
@ -849,13 +860,15 @@ SDValue PIC16TargetLowering::ConvertToMemOperand(SDValue Op,
DAG.getEntryNode(), DAG.getEntryNode(),
Op, ES, Op, ES,
DAG.getConstant (1, MVT::i8), // Banksel. DAG.getConstant (1, MVT::i8), // Banksel.
DAG.getConstant (FI, MVT::i8)); DAG.getConstant (GetTmpOffsetForFI(FI),
MVT::i8));
// Load the value from ES. // Load the value from ES.
SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other); SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other);
SDValue Load = DAG.getNode(PIC16ISD::PIC16Load, dl, Tys, Store, SDValue Load = DAG.getNode(PIC16ISD::PIC16Load, dl, Tys, Store,
ES, DAG.getConstant (1, MVT::i8), ES, DAG.getConstant (1, MVT::i8),
DAG.getConstant (FI, MVT::i8)); DAG.getConstant (GetTmpOffsetForFI(FI),
MVT::i8));
return Load.getValue(0); return Load.getValue(0);
} }
@ -1212,29 +1225,34 @@ SDValue PIC16TargetLowering::LowerSUB(SDValue Op, SelectionDAG &DAG) {
return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1)); return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1));
} }
// LowerFORMAL_ARGUMENTS - In Lowering FORMAL ARGUMENTS - MERGE_VALUES nodes // LowerFORMAL_ARGUMENTS - Argument values are loaded from the
// is returned. MERGE_VALUES nodes number of operands and number of values are // <fname>.args + offset. All arguments are already broken to leaglized
// equal. Therefore to construct MERGE_VALUE node, UNDEF nodes equal to the // types, so the offset just runs from 0 to NumArgVals - 1.
// number of arguments of function have been created.
SDValue PIC16TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op, SDValue PIC16TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op,
SelectionDAG &DAG) { SelectionDAG &DAG) {
SmallVector<SDValue, 8> ArgValues; SmallVector<SDValue, 8> ArgValues;
unsigned NumArgs = Op.getNode()->getNumValues()-1; unsigned NumArgVals = Op.getNode()->getNumValues() - 1;
DebugLoc dl = Op.getDebugLoc(); DebugLoc dl = Op.getDebugLoc();
SDValue Chain = Op.getOperand(0); // Formal arguments' chain SDValue Chain = Op.getOperand(0); // Formal arguments' chain
// Reset the map of FI and TmpOffset
ResetTmpOffsetMap();
// Get the callee's name to create the <fname>.args label to pass args.
MachineFunction &MF = DAG.getMachineFunction(); MachineFunction &MF = DAG.getMachineFunction();
//const TargetData *TD = getTargetData();
const Function *F = MF.getFunction(); const Function *F = MF.getFunction();
std::string FuncName = F->getName(); std::string FuncName = F->getName();
// Create the <fname>.args external symbol.
char *tmpName = new char [strlen(FuncName.c_str()) + 6]; char *tmpName = new char [strlen(FuncName.c_str()) + 6];
sprintf(tmpName, "%s.args", FuncName.c_str()); sprintf(tmpName, "%s.args", FuncName.c_str());
SDVTList VTs = DAG.getVTList (MVT::i8, MVT::Other);
SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8); SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
// Load arg values from the label + offset.
SDVTList VTs = DAG.getVTList (MVT::i8, MVT::Other);
SDValue BS = DAG.getConstant(1, MVT::i8); SDValue BS = DAG.getConstant(1, MVT::i8);
for (unsigned i=0; i<NumArgs ; ++i) { for (unsigned i = 0; i < NumArgVals ; ++i) {
SDValue Offset = DAG.getConstant(i, MVT::i8); SDValue Offset = DAG.getConstant(i, MVT::i8);
SDValue PICLoad = DAG.getNode(PIC16ISD::PIC16LdArg, dl, VTs, Chain, ES, BS, SDValue PICLoad = DAG.getNode(PIC16ISD::PIC16LdArg, dl, VTs, Chain, ES, BS,
Offset); Offset);
@ -1242,10 +1260,10 @@ SDValue PIC16TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op,
ArgValues.push_back(PICLoad); ArgValues.push_back(PICLoad);
} }
// Return a MERGE_VALUE node.
ArgValues.push_back(Op.getOperand(0)); ArgValues.push_back(Op.getOperand(0));
return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(), return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(),
&ArgValues[0], &ArgValues[0], ArgValues.size()).getValue(Op.getResNo());
ArgValues.size()).getValue(Op.getResNo());
} }
// Perform DAGCombine of PIC16Load. // Perform DAGCombine of PIC16Load.

View File

@ -19,6 +19,7 @@
#include "PIC16Subtarget.h" #include "PIC16Subtarget.h"
#include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetLowering.h"
#include <map>
namespace llvm { namespace llvm {
namespace PIC16ISD { namespace PIC16ISD {
@ -117,6 +118,16 @@ namespace llvm {
SDValue PerformPIC16LoadCombine(SDNode *N, DAGCombinerInfo &DCI) const; SDValue PerformPIC16LoadCombine(SDNode *N, DAGCombinerInfo &DCI) const;
SDValue PerformStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const; SDValue PerformStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const;
// This function returns the Tmp Offset for FrameIndex. If any TmpOffset
// already exists for the FI then it returns the same else it creates the
// new offset and returns.
unsigned GetTmpOffsetForFI(unsigned FI);
void ResetTmpOffsetMap() { FiTmpOffsetMap.clear(); SetTmpSize(0); }
// Return the size of Tmp variable
unsigned GetTmpSize() { return TmpSize; }
void SetTmpSize(unsigned Size) { TmpSize = Size; }
private: private:
// If the Node is a BUILD_PAIR representing a direct Address, // If the Node is a BUILD_PAIR representing a direct Address,
// then this function will return true. // then this function will return true.
@ -170,6 +181,11 @@ namespace llvm {
// Check if operation has a direct load operand. // Check if operation has a direct load operand.
inline bool isDirectLoad(const SDValue Op); inline bool isDirectLoad(const SDValue Op);
private:
// The frameindexes generated for spill/reload are stack based.
// This maps maintain zero based indexes for these FIs.
std::map<unsigned, unsigned> FiTmpOffsetMap;
unsigned TmpSize;
}; };
} // namespace llvm } // namespace llvm

View File

@ -69,6 +69,7 @@ void PIC16InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I, MachineBasicBlock::iterator I,
unsigned SrcReg, bool isKill, int FI, unsigned SrcReg, bool isKill, int FI,
const TargetRegisterClass *RC) const { const TargetRegisterClass *RC) const {
PIC16TargetLowering *PTLI = TM.getTargetLowering();
DebugLoc DL = DebugLoc::getUnknownLoc(); DebugLoc DL = DebugLoc::getUnknownLoc();
if (I != MBB.end()) DL = I->getDebugLoc(); if (I != MBB.end()) DL = I->getDebugLoc();
@ -84,7 +85,7 @@ void PIC16InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
//MachineRegisterInfo &RI = MF.getRegInfo(); //MachineRegisterInfo &RI = MF.getRegInfo();
BuildMI(MBB, I, DL, get(PIC16::movwf)) BuildMI(MBB, I, DL, get(PIC16::movwf))
.addReg(SrcReg, false, false, isKill) .addReg(SrcReg, false, false, isKill)
.addImm(FI) .addImm(PTLI->GetTmpOffsetForFI(FI))
.addExternalSymbol(tmpName) .addExternalSymbol(tmpName)
.addImm(1); // Emit banksel for it. .addImm(1); // Emit banksel for it.
} }
@ -98,6 +99,7 @@ void PIC16InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I, MachineBasicBlock::iterator I,
unsigned DestReg, int FI, unsigned DestReg, int FI,
const TargetRegisterClass *RC) const { const TargetRegisterClass *RC) const {
PIC16TargetLowering *PTLI = TM.getTargetLowering();
DebugLoc DL = DebugLoc::getUnknownLoc(); DebugLoc DL = DebugLoc::getUnknownLoc();
if (I != MBB.end()) DL = I->getDebugLoc(); if (I != MBB.end()) DL = I->getDebugLoc();
@ -112,7 +114,7 @@ void PIC16InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
//MachineFunction &MF = *MBB.getParent(); //MachineFunction &MF = *MBB.getParent();
//MachineRegisterInfo &RI = MF.getRegInfo(); //MachineRegisterInfo &RI = MF.getRegInfo();
BuildMI(MBB, I, DL, get(PIC16::movf), DestReg) BuildMI(MBB, I, DL, get(PIC16::movf), DestReg)
.addImm(FI) .addImm(PTLI->GetTmpOffsetForFI(FI))
.addExternalSymbol(tmpName) .addExternalSymbol(tmpName)
.addImm(1); // Emit banksel for it. .addImm(1); // Emit banksel for it.
} }