Map stack based frameindices for spills to zero based indices that can be accessed based on an external symbol defining the location of temporary data for a function. For example: we have spill slots addressed as foo.tmp + 0, foo.tmp + 1 etc.
llvm-svn: 68442
This commit is contained in:
parent
56382aa890
commit
0b08df8c09
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@ -343,7 +343,6 @@ bool PIC16AsmPrinter::doFinalization(Module &M) {
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void PIC16AsmPrinter::emitFunctionData(MachineFunction &MF) {
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void PIC16AsmPrinter::emitFunctionData(MachineFunction &MF) {
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const Function *F = MF.getFunction();
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const Function *F = MF.getFunction();
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std::string FuncName = Mang->getValueName(F);
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std::string FuncName = Mang->getValueName(F);
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MachineFrameInfo *MFI= MF.getFrameInfo();
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Module *M = const_cast<Module *>(F->getParent());
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Module *M = const_cast<Module *>(F->getParent());
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const TargetData *TD = TM.getTargetData();
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const TargetData *TD = TM.getTargetData();
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unsigned FrameSize = 0;
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unsigned FrameSize = 0;
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@ -406,15 +405,7 @@ void PIC16AsmPrinter::emitFunctionData(MachineFunction &MF) {
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O << VarName << " RES " << Size << "\n";
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O << VarName << " RES " << Size << "\n";
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}
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}
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int TempSize = PTLI->GetTmpSize();
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// Emit the variable to hold the space for temporary locations
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if (TempSize > 0 )
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// in function frame.
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if (MFI->hasStackObjects()) {
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int indexBegin = MFI->getObjectIndexBegin();
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int indexEnd = MFI->getObjectIndexEnd();
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if (indexBegin < indexEnd) {
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int TempSize = indexEnd - indexBegin;
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O << CurrentFnName << ".tmp RES " << TempSize <<"\n";
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O << CurrentFnName << ".tmp RES " << TempSize <<"\n";
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}
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}
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}
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}
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@ -24,11 +24,12 @@
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namespace llvm {
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namespace llvm {
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struct VISIBILITY_HIDDEN PIC16AsmPrinter : public AsmPrinter {
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struct VISIBILITY_HIDDEN PIC16AsmPrinter : public AsmPrinter {
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PIC16AsmPrinter(raw_ostream &O, TargetMachine &TM,
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PIC16AsmPrinter(raw_ostream &O, PIC16TargetMachine &TM,
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const TargetAsmInfo *T, bool F, bool V)
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const TargetAsmInfo *T, bool F, bool V)
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: AsmPrinter(O, TM, T, F, V) {
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: AsmPrinter(O, TM, T, F, V) {
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CurBank = "";
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CurBank = "";
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IsRomData = false;
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IsRomData = false;
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PTLI = TM.getTargetLowering();
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}
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}
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private :
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private :
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virtual const char *getPassName() const {
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virtual const char *getPassName() const {
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@ -51,6 +52,7 @@ namespace llvm {
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bool doFinalization(Module &M);
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bool doFinalization(Module &M);
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private:
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private:
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PIC16TargetLowering *PTLI;
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std::string CurBank;
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std::string CurBank;
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bool IsRomData;
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bool IsRomData;
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};
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};
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@ -31,7 +31,7 @@ using namespace llvm;
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// PIC16TargetLowering Constructor.
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// PIC16TargetLowering Constructor.
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PIC16TargetLowering::PIC16TargetLowering(PIC16TargetMachine &TM)
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PIC16TargetLowering::PIC16TargetLowering(PIC16TargetMachine &TM)
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: TargetLowering(TM) {
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: TargetLowering(TM), TmpSize(0) {
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Subtarget = &TM.getSubtarget<PIC16Subtarget>();
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Subtarget = &TM.getSubtarget<PIC16Subtarget>();
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@ -154,6 +154,17 @@ static SDValue getOutFlag(SDValue &Op) {
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return Flag;
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return Flag;
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}
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}
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// Get the TmpOffset for FrameIndex
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unsigned PIC16TargetLowering::GetTmpOffsetForFI(unsigned FI) {
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std::map<unsigned, unsigned>::iterator
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MapIt = FiTmpOffsetMap.find(FI);
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if (MapIt != FiTmpOffsetMap.end())
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return MapIt->second;
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// This FI (FrameIndex) is not yet mapped, so map it
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FiTmpOffsetMap[FI] = TmpSize;
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return TmpSize++;
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}
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// To extract chain value from the SDValue Nodes
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// To extract chain value from the SDValue Nodes
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// This function will help to maintain the chain extracting
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// This function will help to maintain the chain extracting
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@ -541,7 +552,7 @@ PIC16TargetLowering::LegalizeFrameIndex(SDValue Op, SelectionDAG &DAG,
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// and non-constant operand of ADD will be treated as pointer.
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// and non-constant operand of ADD will be treated as pointer.
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// Returns the high and lo part of the address, and the offset(in case of ADD).
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// Returns the high and lo part of the address, and the offset(in case of ADD).
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void PIC16TargetLowering:: LegalizeAddress(SDValue Ptr, SelectionDAG &DAG,
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void PIC16TargetLowering::LegalizeAddress(SDValue Ptr, SelectionDAG &DAG,
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SDValue &Lo, SDValue &Hi,
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SDValue &Lo, SDValue &Hi,
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unsigned &Offset, DebugLoc dl) {
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unsigned &Offset, DebugLoc dl) {
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@ -849,13 +860,15 @@ SDValue PIC16TargetLowering::ConvertToMemOperand(SDValue Op,
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DAG.getEntryNode(),
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DAG.getEntryNode(),
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Op, ES,
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Op, ES,
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DAG.getConstant (1, MVT::i8), // Banksel.
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DAG.getConstant (1, MVT::i8), // Banksel.
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DAG.getConstant (FI, MVT::i8));
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DAG.getConstant (GetTmpOffsetForFI(FI),
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MVT::i8));
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// Load the value from ES.
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// Load the value from ES.
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SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other);
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SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Other);
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SDValue Load = DAG.getNode(PIC16ISD::PIC16Load, dl, Tys, Store,
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SDValue Load = DAG.getNode(PIC16ISD::PIC16Load, dl, Tys, Store,
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ES, DAG.getConstant (1, MVT::i8),
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ES, DAG.getConstant (1, MVT::i8),
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DAG.getConstant (FI, MVT::i8));
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DAG.getConstant (GetTmpOffsetForFI(FI),
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MVT::i8));
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return Load.getValue(0);
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return Load.getValue(0);
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}
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}
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@ -1212,29 +1225,34 @@ SDValue PIC16TargetLowering::LowerSUB(SDValue Op, SelectionDAG &DAG) {
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return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1));
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return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1));
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}
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}
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// LowerFORMAL_ARGUMENTS - In Lowering FORMAL ARGUMENTS - MERGE_VALUES nodes
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// LowerFORMAL_ARGUMENTS - Argument values are loaded from the
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// is returned. MERGE_VALUES nodes number of operands and number of values are
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// <fname>.args + offset. All arguments are already broken to leaglized
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// equal. Therefore to construct MERGE_VALUE node, UNDEF nodes equal to the
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// types, so the offset just runs from 0 to NumArgVals - 1.
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// number of arguments of function have been created.
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SDValue PIC16TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op,
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SDValue PIC16TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op,
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SelectionDAG &DAG) {
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SelectionDAG &DAG) {
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SmallVector<SDValue, 8> ArgValues;
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SmallVector<SDValue, 8> ArgValues;
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unsigned NumArgs = Op.getNode()->getNumValues()-1;
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unsigned NumArgVals = Op.getNode()->getNumValues() - 1;
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DebugLoc dl = Op.getDebugLoc();
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DebugLoc dl = Op.getDebugLoc();
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SDValue Chain = Op.getOperand(0); // Formal arguments' chain
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SDValue Chain = Op.getOperand(0); // Formal arguments' chain
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// Reset the map of FI and TmpOffset
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ResetTmpOffsetMap();
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// Get the callee's name to create the <fname>.args label to pass args.
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MachineFunction &MF = DAG.getMachineFunction();
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MachineFunction &MF = DAG.getMachineFunction();
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//const TargetData *TD = getTargetData();
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const Function *F = MF.getFunction();
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const Function *F = MF.getFunction();
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std::string FuncName = F->getName();
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std::string FuncName = F->getName();
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// Create the <fname>.args external symbol.
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char *tmpName = new char [strlen(FuncName.c_str()) + 6];
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char *tmpName = new char [strlen(FuncName.c_str()) + 6];
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sprintf(tmpName, "%s.args", FuncName.c_str());
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sprintf(tmpName, "%s.args", FuncName.c_str());
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SDVTList VTs = DAG.getVTList (MVT::i8, MVT::Other);
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SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
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SDValue ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
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// Load arg values from the label + offset.
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SDVTList VTs = DAG.getVTList (MVT::i8, MVT::Other);
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SDValue BS = DAG.getConstant(1, MVT::i8);
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SDValue BS = DAG.getConstant(1, MVT::i8);
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for (unsigned i=0; i<NumArgs ; ++i) {
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for (unsigned i = 0; i < NumArgVals ; ++i) {
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SDValue Offset = DAG.getConstant(i, MVT::i8);
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SDValue Offset = DAG.getConstant(i, MVT::i8);
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SDValue PICLoad = DAG.getNode(PIC16ISD::PIC16LdArg, dl, VTs, Chain, ES, BS,
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SDValue PICLoad = DAG.getNode(PIC16ISD::PIC16LdArg, dl, VTs, Chain, ES, BS,
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Offset);
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Offset);
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@ -1242,10 +1260,10 @@ SDValue PIC16TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op,
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ArgValues.push_back(PICLoad);
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ArgValues.push_back(PICLoad);
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}
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}
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// Return a MERGE_VALUE node.
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ArgValues.push_back(Op.getOperand(0));
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ArgValues.push_back(Op.getOperand(0));
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return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(),
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return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getNode()->getVTList(),
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&ArgValues[0],
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&ArgValues[0], ArgValues.size()).getValue(Op.getResNo());
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ArgValues.size()).getValue(Op.getResNo());
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}
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}
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// Perform DAGCombine of PIC16Load.
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// Perform DAGCombine of PIC16Load.
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@ -19,6 +19,7 @@
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#include "PIC16Subtarget.h"
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#include "PIC16Subtarget.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/TargetLowering.h"
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#include <map>
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namespace llvm {
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namespace llvm {
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namespace PIC16ISD {
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namespace PIC16ISD {
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@ -117,6 +118,16 @@ namespace llvm {
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SDValue PerformPIC16LoadCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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SDValue PerformPIC16LoadCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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SDValue PerformStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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SDValue PerformStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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// This function returns the Tmp Offset for FrameIndex. If any TmpOffset
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// already exists for the FI then it returns the same else it creates the
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// new offset and returns.
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unsigned GetTmpOffsetForFI(unsigned FI);
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void ResetTmpOffsetMap() { FiTmpOffsetMap.clear(); SetTmpSize(0); }
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// Return the size of Tmp variable
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unsigned GetTmpSize() { return TmpSize; }
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void SetTmpSize(unsigned Size) { TmpSize = Size; }
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private:
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private:
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// If the Node is a BUILD_PAIR representing a direct Address,
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// If the Node is a BUILD_PAIR representing a direct Address,
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// then this function will return true.
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// then this function will return true.
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@ -170,6 +181,11 @@ namespace llvm {
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// Check if operation has a direct load operand.
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// Check if operation has a direct load operand.
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inline bool isDirectLoad(const SDValue Op);
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inline bool isDirectLoad(const SDValue Op);
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private:
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// The frameindexes generated for spill/reload are stack based.
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// This maps maintain zero based indexes for these FIs.
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std::map<unsigned, unsigned> FiTmpOffsetMap;
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unsigned TmpSize;
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};
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};
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} // namespace llvm
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} // namespace llvm
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@ -69,6 +69,7 @@ void PIC16InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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MachineBasicBlock::iterator I,
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unsigned SrcReg, bool isKill, int FI,
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unsigned SrcReg, bool isKill, int FI,
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const TargetRegisterClass *RC) const {
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const TargetRegisterClass *RC) const {
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PIC16TargetLowering *PTLI = TM.getTargetLowering();
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DebugLoc DL = DebugLoc::getUnknownLoc();
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DebugLoc DL = DebugLoc::getUnknownLoc();
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if (I != MBB.end()) DL = I->getDebugLoc();
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if (I != MBB.end()) DL = I->getDebugLoc();
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@ -84,7 +85,7 @@ void PIC16InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
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//MachineRegisterInfo &RI = MF.getRegInfo();
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//MachineRegisterInfo &RI = MF.getRegInfo();
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BuildMI(MBB, I, DL, get(PIC16::movwf))
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BuildMI(MBB, I, DL, get(PIC16::movwf))
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.addReg(SrcReg, false, false, isKill)
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.addReg(SrcReg, false, false, isKill)
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.addImm(FI)
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.addImm(PTLI->GetTmpOffsetForFI(FI))
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.addExternalSymbol(tmpName)
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.addExternalSymbol(tmpName)
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.addImm(1); // Emit banksel for it.
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.addImm(1); // Emit banksel for it.
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}
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}
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@ -98,6 +99,7 @@ void PIC16InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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MachineBasicBlock::iterator I,
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unsigned DestReg, int FI,
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unsigned DestReg, int FI,
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const TargetRegisterClass *RC) const {
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const TargetRegisterClass *RC) const {
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PIC16TargetLowering *PTLI = TM.getTargetLowering();
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DebugLoc DL = DebugLoc::getUnknownLoc();
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DebugLoc DL = DebugLoc::getUnknownLoc();
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if (I != MBB.end()) DL = I->getDebugLoc();
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if (I != MBB.end()) DL = I->getDebugLoc();
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@ -112,7 +114,7 @@ void PIC16InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
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//MachineFunction &MF = *MBB.getParent();
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//MachineFunction &MF = *MBB.getParent();
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//MachineRegisterInfo &RI = MF.getRegInfo();
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//MachineRegisterInfo &RI = MF.getRegInfo();
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BuildMI(MBB, I, DL, get(PIC16::movf), DestReg)
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BuildMI(MBB, I, DL, get(PIC16::movf), DestReg)
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.addImm(FI)
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.addImm(PTLI->GetTmpOffsetForFI(FI))
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.addExternalSymbol(tmpName)
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.addExternalSymbol(tmpName)
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.addImm(1); // Emit banksel for it.
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.addImm(1); // Emit banksel for it.
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}
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}
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