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ScopInfo: Do not generate dependences for i1 values used in affine branches 

Affine branches are fully modeled and regenerated from the polyhedral domain and
consequently do not require any input conditions to be propagated.

llvm-svn: 263678
This commit is contained in:
Tobias Grosser 2016-03-16 23:33:54 +00:00
parent 31275a1413
commit 0904c69110
3 changed files with 11 additions and 9 deletions
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7
polly/lib/Analysis/ScopInfo.cpp
View File

@ -4148,8 +4148,13 @@ void ScopInfo::buildAccessFunctions(Region &R, BasicBlock &BB,
if (isIgnoredIntrinsic(&Inst))
continue;
if (!PHI)
// PHI nodes have already been modeled above and TerminatorInsts that are
// not part of a non-affine subregion are fully modeled and regenerated
// from the polyhedral domains. Hence, they do not need to be modeled as
// explicit data dependences.
if (!PHI && (!isa<TerminatorInst>(&Inst) || NonAffineSubRegion))
buildScalarDependences(&Inst);
if (!IsExitBlock)
buildEscapingDependences(&Inst);
}

2
polly/test/ScopInfo/invariant-loads-leave-read-only-statements.ll
View File

@ -8,8 +8,6 @@
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_top_split[] -> [0, 0, 0, 0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_top_split[] -> MemRef_26[] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [p_0, p_1, p_2] -> { Stmt_top_split[] -> MemRef_25[] };
; CHECK-NEXT: Stmt_L_4
; CHECK-NEXT: Domain :=

11
polly/test/ScopInfo/scalar_dependence_cond_br.ll
View File

@ -6,13 +6,12 @@
; A[i]++;
; }
;
; FIXME: This test is a negative test until we have an independent blocks alternative.
; Verify that we do not generate a value write access for the use of %cmp1 in
; the branch condition. As _affine_ branches are fully modeled and regenerated
; from the polyhedral information we do not need this value to be available
; during code generation.
;
; We should move operands as close to their use as possible, hence in this case
; there should not be any scalar dependence anymore after %cmp1 is moved to
; %for.body (%c and %indvar.iv are synthesis able).
;
; CHECK: [Scalar: 1]
; CHECK-NOT: Stmt_for_cond[i0] -> MemRef_cmp1[] }
;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"