Use isTerminator() instead of isBranch()||isReturn() in
several places. isTerminator() returns true for a superset of cases, and includes things like FP_REG_KILL, which are nither return or branch but aren't safe to move/remat/etc. llvm-svn: 61373
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@ -707,7 +707,7 @@ bool MachineInstr::isSafeToMove(const TargetInstrInfo *TII,
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SawStore = true;
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return false;
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}
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if (TID->isReturn() || TID->isBranch() || TID->hasUnmodeledSideEffects())
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if (TID->isTerminator() || TID->hasUnmodeledSideEffects())
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return false;
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// See if this instruction does a load. If so, we have to guarantee that the
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@ -205,7 +205,7 @@ bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
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const TargetInstrDesc &TID = I.getDesc();
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// Ignore stuff that we obviously can't hoist.
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if (TID.mayStore() || TID.isCall() || TID.isReturn() || TID.isBranch() ||
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if (TID.mayStore() || TID.isCall() || TID.isTerminator() ||
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TID.hasUnmodeledSideEffects())
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return false;
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@ -275,8 +275,7 @@ void ScheduleDAGInstrs::BuildSchedUnits() {
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// after stack slots are lowered to actual addresses.
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// TODO: Use an AliasAnalysis and do real alias-analysis queries, and
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// produce more precise dependence information.
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if (TID.isCall() || TID.isReturn() || TID.isBranch() ||
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TID.hasUnmodeledSideEffects()) {
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if (TID.isCall() || TID.isTerminator() || TID.hasUnmodeledSideEffects()) {
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new_chain:
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// This is the conservative case. Add dependencies on all memory
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// references.
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@ -300,7 +299,7 @@ void ScheduleDAGInstrs::BuildSchedUnits() {
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// See if it is known to just have a single memory reference.
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MachineInstr *ChainMI = Chain->getInstr();
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const TargetInstrDesc &ChainTID = ChainMI->getDesc();
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if (!ChainTID.isCall() && !ChainTID.isReturn() && !ChainTID.isBranch() &&
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if (!ChainTID.isCall() && !ChainTID.isTerminator() &&
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!ChainTID.hasUnmodeledSideEffects() &&
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ChainMI->hasOneMemOperand() &&
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!ChainMI->memoperands_begin()->isVolatile() &&
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