make tblgen produce a function that returns the name for a physreg.

Nothing is using this info yet.

llvm-svn: 81707
This commit is contained in:
Chris Lattner 2009-09-13 20:08:00 +00:00
parent 6822e695c1
commit 06c5eed9e9
15 changed files with 78 additions and 12 deletions

View File

@ -146,6 +146,8 @@ namespace {
void PrintGlobalVariable(const GlobalVariable* GVar);
void printInstruction(const MachineInstr *MI); // autogenerated.
const char *getRegisterName(unsigned RegNo) const;
void printMachineInstruction(const MachineInstr *MI);
bool runOnMachineFunction(MachineFunction &F);
bool doInitialization(Module &M);

View File

@ -49,6 +49,8 @@ namespace {
return "Alpha Assembly Printer";
}
void printInstruction(const MachineInstr *MI);
const char *getRegisterName(unsigned RegNo) const;
void printOp(const MachineOperand &MO, bool IsCallOp = false);
void printOperand(const MachineInstr *MI, int opNum);
void printBaseOffsetPair(const MachineInstr *MI, int i, bool brackets=true);

View File

@ -51,6 +51,8 @@ namespace {
void printOperand(const MachineInstr *MI, int opNum);
void printMemoryOperand(const MachineInstr *MI, int opNum);
void printInstruction(const MachineInstr *MI); // autogenerated.
const char *getRegisterName(unsigned RegNo) const;
void emitLinkage(const std::string &n, GlobalValue::LinkageTypes l);
bool runOnMachineFunction(MachineFunction &F);
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,

View File

@ -66,10 +66,10 @@ namespace {
}
/// printInstruction - This method is automatically generated by tablegen
/// from the instruction set description. This method returns true if the
/// machine instruction was sufficiently described to print it, otherwise it
/// returns false.
/// from the instruction set description.
void printInstruction(const MachineInstr *MI);
const char *getRegisterName(unsigned RegNo) const;
void printMachineInstruction(const MachineInstr *MI);
void printOp(const MachineOperand &MO);

View File

@ -58,6 +58,8 @@ namespace {
const char* Modifier = 0);
void printCCOperand(const MachineInstr *MI, int OpNum);
void printInstruction(const MachineInstr *MI); // autogenerated.
const char *getRegisterName(unsigned RegNo) const;
void printMachineInstruction(const MachineInstr * MI);
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant,

View File

@ -82,6 +82,8 @@ namespace {
void emitFrameDirective(MachineFunction &MF);
void printInstruction(const MachineInstr *MI); // autogenerated.
const char *getRegisterName(unsigned RegNo) const;
bool runOnMachineFunction(MachineFunction &F);
bool doInitialization(Module &M);
};

View File

@ -45,6 +45,8 @@ namespace llvm {
void printOperand(const MachineInstr *MI, int opNum);
void printCCOperand(const MachineInstr *MI, int opNum);
void printInstruction(const MachineInstr *MI); // definition autogenerated.
const char *getRegisterName(unsigned RegNo) const;
bool printMachineInstruction(const MachineInstr *MI);
void EmitFunctionDecls (Module &M);
void EmitUndefinedVars (Module &M);

View File

@ -120,6 +120,8 @@ namespace {
/// machine instruction was sufficiently described to print it, otherwise it
/// returns false.
void printInstruction(const MachineInstr *MI);
const char *getRegisterName(unsigned RegNo) const;
void printMachineInstruction(const MachineInstr *MI);
void printOp(const MachineOperand &MO);

View File

@ -68,6 +68,8 @@ namespace {
void printCCOperand(const MachineInstr *MI, int opNum);
void printInstruction(const MachineInstr *MI); // autogenerated.
const char *getRegisterName(unsigned RegNo) const;
bool runOnMachineFunction(MachineFunction &F);
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant, const char *ExtraCode);

View File

@ -67,6 +67,8 @@ namespace {
}
void printInstruction(const MachineInstr *MI); // autogenerated.
const char *getRegisterName(unsigned RegNo) const;
void printMachineInstruction(const MachineInstr * MI);
void emitFunctionHeader(const MachineFunction &MF);

View File

@ -29,7 +29,10 @@ public:
X86ATTInstPrinter(raw_ostream &o, const MCAsmInfo *mai,
const TargetRegisterInfo *tri) : O(o), MAI(mai), TRI(tri) {}
// Autogenerated by tblgen.
void printInstruction(const MCInst *MI);
const char *getRegisterName(unsigned RegNo) const;
void printOperand(const MCInst *MI, unsigned OpNo,
const char *Modifier = 0);

View File

@ -38,6 +38,8 @@ struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter {
/// machine instruction was sufficiently described to print it, otherwise it
/// returns false.
void printInstruction(const MachineInstr *MI);
const char *getRegisterName(unsigned RegNo) const;
// This method is used by the tablegen'erated instruction printer.
void printOperand(const MachineInstr *MI, unsigned OpNo,

View File

@ -80,6 +80,8 @@ namespace {
void emitFunctionEnd(MachineFunction &MF);
void printInstruction(const MachineInstr *MI); // autogenerated.
const char *getRegisterName(unsigned RegNo) const;
void printMachineInstruction(const MachineInstr *MI);
bool runOnMachineFunction(MachineFunction &F);
bool doInitialization(Module &M);

View File

@ -538,19 +538,16 @@ FindUniqueOperandCommands(std::vector<std::string> &UniqueOperandCommands,
}
void AsmWriterEmitter::run(raw_ostream &O) {
EmitSourceFileHeader("Assembly Writer Source Fragment", O);
/// EmitPrintInstruction - Generate the code for the "printInstruction" method
/// implementation.
void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
CodeGenTarget Target;
Record *AsmWriter = Target.getAsmWriter();
std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
O <<
"/// printInstruction - This method is automatically generated by tablegen\n"
"/// from the instruction set description. This method returns true if the\n"
"/// machine instruction was sufficiently described to print it, otherwise\n"
"/// it returns false.\n"
"/// from the instruction set description.\n"
"void " << Target.getName() << ClassName
<< "::printInstruction(const MachineInstr *MI) {\n";
@ -794,3 +791,44 @@ void AsmWriterEmitter::run(raw_ostream &O) {
O << " return;\n";
O << "}\n";
}
void AsmWriterEmitter::EmitGetRegisterName(raw_ostream &O) {
CodeGenTarget Target;
Record *AsmWriter = Target.getAsmWriter();
std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
O <<
"\n\n/// getRegisterName - This method is automatically generated by tblgen\n"
"/// from the register set description. This returns the assembler name\n"
"/// for the specified register.\n"
"const char *" << Target.getName() << ClassName
<< "::getRegisterName(unsigned RegNo) const {\n"
<< " assert(RegNo && RegNo < " << (Registers.size()+1)
<< " && \"Invalid register number!\");\n"
<< "\n"
<< " static const char *const RegAsmNames[] = {\n";
for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
const CodeGenRegister &Reg = Registers[i];
std::string AsmName = Reg.TheDef->getValueAsString("AsmName");
if (AsmName.empty())
AsmName = Reg.getName();
O << " \"" << AsmName << "\",\n";
}
O << " 0\n"
<< " };\n"
<< "\n"
<< " return RegAsmNames[RegNo-1];\n"
<< "}\n";
}
void AsmWriterEmitter::run(raw_ostream &O) {
EmitSourceFileHeader("Assembly Writer Source Fragment", O);
EmitPrintInstruction(O);
EmitGetRegisterName(O);
}

View File

@ -35,6 +35,9 @@ namespace llvm {
void run(raw_ostream &o);
private:
void EmitPrintInstruction(raw_ostream &o);
void EmitGetRegisterName(raw_ostream &o);
AsmWriterInst *getAsmWriterInstByID(unsigned ID) const {
assert(ID < NumberedInstructions.size());
std::map<const CodeGenInstruction*, AsmWriterInst*>::const_iterator I =