Fix some more failures by converting to FileCheck.

llvm-svn: 85207

llvm/test/CodeGen/ARM/arguments.ll

@@ -1,9 +1,9 @@
-; RUN: llc < %s -mtriple=arm-linux-gnueabi | \
-; RUN:   grep {mov r0, r2} | count 1
-; RUN: llc < %s -mtriple=arm-apple-darwin | \
-; RUN:   grep {mov r0, r1} | count 1
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=ELF
+; RUN: llc < %s -mtriple=arm-apple-darwin  | FileCheck %s -check-prefix=DARWIN
 
 define i32 @f(i32 %a, i64 %b) {
+; ELF: mov r0, r2
+; DARWIN: mov r0, r1
         %tmp = call i32 @g(i64 %b)
         ret i32 %tmp
 }

llvm/test/CodeGen/ARM/arguments_f64_backfill.ll

@@ -1,6 +1,7 @@
-; RUN: llc < %s -mtriple=arm-linux-gnueabi -mattr=+vfp2 -float-abi=hard | grep {fcpys s0, s1}
+; RUN: llc < %s -mtriple=arm-linux-gnueabi -mattr=+vfp2 -float-abi=hard | FileCheck %s
 
 define float @f(float %z, double %a, float %b) {
+; CHECK: fcpys s0, s1
         %tmp = call float @g(float %b)
         ret float %tmp
 }

llvm/test/CodeGen/ARM/arm-negative-stride.ll

@@ -1,7 +1,8 @@
-; RUN: llc < %s -march=arm | grep {str r1, \\\[r.*, -r.*, lsl #2\}
+; RUN: llc < %s -march=arm | FileCheck %s
 
 define void @test(i32* %P, i32 %A, i32 %i) nounwind {
 entry:
+; CHECK: str r1, [{{r.*}}, -{{r.*}}, lsl #2]
         icmp eq i32 %i, 0               ; <i1>:0 [#uses=1]
         br i1 %0, label %return, label %bb
 

llvm/test/CodeGen/ARM/bfc.ll

@@ -1,19 +1,25 @@
-; RUN: llc < %s -march=arm -mattr=+v6t2 | grep "bfc " | count 3
+; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s
 
 ; 4278190095 = 0xff00000f
 define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: bfc
     %tmp = and i32 %a, 4278190095
     ret i32 %tmp
 }
 
 ; 4286578688 = 0xff800000
 define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: bfc
     %tmp = and i32 %a, 4286578688
     ret i32 %tmp
 }
 
 ; 4095 = 0x00000fff
 define i32 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: bfc
     %tmp = and i32 %a, 4095
     ret i32 %tmp
 }

llvm/test/CodeGen/ARM/call.ll

@@ -1,13 +1,16 @@
-; RUN: llc < %s -march=arm | grep {mov lr, pc}
-; RUN: llc < %s -march=arm -mattr=+v5t | grep blx
+; RUN: llc < %s -march=arm | FileCheck %s -check-prefix=CHECKV4
+; RUN: llc < %s -march=arm -mattr=+v5t | FileCheck %s -check-prefix=CHECKV5
 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi\
-; RUN:   -relocation-model=pic | grep {PLT}
+; RUN:   -relocation-model=pic | FileCheck %s -check-prefix=CHECKELF
 
 @t = weak global i32 ()* null           ; <i32 ()**> [#uses=1]
 
 declare void @g(i32, i32, i32, i32)
 
 define void @f() {
+; CHECKV4: mov lr, pc
+; CHECKV5: blx
+; CHECKELF: PLT
         call void @g( i32 1, i32 2, i32 3, i32 4 )
         ret void
 }

llvm/test/CodeGen/ARM/carry.ll

@@ -1,14 +1,19 @@
-; RUN: llc < %s -march=arm | grep "subs r" | count 2
-; RUN: llc < %s -march=arm | grep "adc r"
-; RUN: llc < %s -march=arm | grep "sbc r"  | count 2
+; RUN: llc < %s -march=arm | FileCheck %s
 
 define i64 @f1(i64 %a, i64 %b) {
+; CHECK: f1:
+; CHECK: subs r
+; CHECK: sbc r
 entry:
 	%tmp = sub i64 %a, %b
 	ret i64 %tmp
 }
 
 define i64 @f2(i64 %a, i64 %b) {
+; CHECK: f2:
+; CHECK: adc r
+; CHECK: subs r
+; CHECK: sbc r
 entry:
         %tmp1 = shl i64 %a, 1
 	%tmp2 = sub i64 %tmp1, %b

llvm/test/CodeGen/ARM/constants.ll

@@ -1,39 +1,44 @@
-; RUN: llc < %s -march=arm | \
-; RUN:   grep {mov r0, #0} | count 1
-; RUN: llc < %s -march=arm | \
-; RUN:   grep {mov r0, #255$} | count 1
-; RUN: llc < %s -march=arm -asm-verbose | \
-; RUN:   grep {mov r0.*256} | count 1
-; RUN: llc < %s -march=arm -asm-verbose | grep {orr.*256} | count 1
-; RUN: llc < %s -march=arm -asm-verbose | grep {mov r0, .*-1073741761} | count 1
-; RUN: llc < %s -march=arm -asm-verbose | grep {mov r0, .*1008} | count 1
-; RUN: llc < %s -march=arm | grep {cmp r0, #1, 16} | count 1
+; RUN: llc < %s -march=arm | FileCheck %s
 
 define i32 @f1() {
+; CHECK: f1
+; CHECK: mov r0, #0
         ret i32 0
 }
 
 define i32 @f2() {
+; CHECK: f2
+; CHECK: mov r0, #255
         ret i32 255
 }
 
 define i32 @f3() {
+; CHECK: f3
+; CHECK: mov r0{{.*}}256
         ret i32 256
 }
 
 define i32 @f4() {
+; CHECK: f4
+; CHECK: orr{{.*}}256
         ret i32 257
 }
 
 define i32 @f5() {
+; CHECK: f5
+; CHECK: mov r0, {{.*}}-1073741761
         ret i32 -1073741761
 }
 
 define i32 @f6() {
+; CHECK: f6
+; CHECK: mov r0, {{.*}}1008
         ret i32 1008
 }
 
 define void @f7(i32 %a) {
+; CHECK: f7
+; CHECK: cmp r0, #1, 16
         %b = icmp ugt i32 %a, 65536             ; <i1> [#uses=1]
         br i1 %b, label %r, label %r