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[AArch64] Added support for the vcvta_u16_f16 instrinsic for FP16 Armv8.2-A 

llvm-svn: 334693
This commit is contained in:
Luke Geeson 2018-06-14 08:28:56 +00:00
parent bfc3406530
commit 010bbbf390
3 changed files with 17 additions and 0 deletions
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3
clang/lib/CodeGen/CGBuiltin.cpp
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@ -3998,6 +3998,7 @@ static const NeonIntrinsicInfo ARMSIMDIntrinsicMap [] = {
NEONMAP0(vcvt_u32_v),
NEONMAP0(vcvt_u64_v),
NEONMAP1(vcvta_s16_v, arm_neon_vcvtas, 0),
NEONMAP1(vcvta_u16_v, arm_neon_vcvtau, 0),
NEONMAP1(vcvta_s32_v, arm_neon_vcvtas, 0),
NEONMAP1(vcvta_s64_v, arm_neon_vcvtas, 0),
NEONMAP1(vcvta_u32_v, arm_neon_vcvtau, 0),
@ -4882,6 +4883,7 @@ Value *CodeGenFunction::EmitCommonNeonBuiltinExpr(
: Builder.CreateFPToSI(Ops[0], Ty, "vcvt");
}
case NEON::BI__builtin_neon_vcvta_s16_v:
case NEON::BI__builtin_neon_vcvta_u16_v:
case NEON::BI__builtin_neon_vcvta_s32_v:
case NEON::BI__builtin_neon_vcvta_s64_v:
case NEON::BI__builtin_neon_vcvta_u32_v:
@ -7623,6 +7625,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
return Builder.CreateFPToSI(Ops[0], Ty);
}
case NEON::BI__builtin_neon_vcvta_s16_v:
case NEON::BI__builtin_neon_vcvta_u16_v:
case NEON::BI__builtin_neon_vcvta_s32_v:
case NEON::BI__builtin_neon_vcvtaq_s16_v:
case NEON::BI__builtin_neon_vcvtaq_s32_v:

7
clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
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@ -164,6 +164,13 @@ int16x4_t test_vcvta_s16_f16 (float16x4_t a) {
return vcvta_s16_f16(a);
}
// CHECK-LABEL: test_vcvta_u16_f16
// CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.aarch64.neon.fcvtau.v4i16.v4f16(<4 x half> %a)
// CHECK: ret <4 x i16> [[VCVT]]
int16x4_t test_vcvta_u16_f16 (float16x4_t a) {
return vcvta_u16_f16(a);
}
// CHECK-LABEL: test_vcvtaq_s16_f16
// CHECK: [[VCVT:%.*]] = call <8 x i16> @llvm.aarch64.neon.fcvtas.v8i16.v8f16(<8 x half> %a)
// CHECK: ret <8 x i16> [[VCVT]]

7
clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c
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@ -164,6 +164,13 @@ int16x4_t test_vcvta_s16_f16 (float16x4_t a) {
return vcvta_s16_f16(a);
}
// CHECK-LABEL: test_vcvta_u16_f16
// CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.arm.neon.fcvtau.v4i16.v4f16(<4 x half> %a)
// CHECK: ret <4 x i16> [[VCVT]]
int16x4_t test_vcvta_u16_f16 (float16x4_t a) {
return vcvta_u16_f16(a);
}
// CHECK-LABEL: test_vcvtaq_s16_f16
// CHECK: [[VCVT:%.*]] = call <8 x i16> @llvm.arm.neon.vcvtas.v8i16.v8f16(<8 x half> %a)
// CHECK: ret <8 x i16> [[VCVT]]