replica
/
hanchenye-llvm-project
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
hanchenye-llvm-project/llvm/test/CodeGen/X86/alloca-align-rounding-32.ll

21 lines
434 B
LLVM
Raw Normal View History

FileCheckize tests. llvm-svn: 159044
2012-06-23 07:04:02 +08:00
; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin | FileCheck %s
Eliminate the restriction that the array size in an alloca must be i32. This will help reduce the amount of casting required on 64-bit targets. llvm-svn: 104911
2010-05-28 09:14:11 +08:00
declare void @bar(<2 x i64>* %n)
define void @foo(i32 %h) {
%p = alloca <2 x i64>, i32 %h
call void @bar(<2 x i64>* %p)
ret void
FileCheckize tests. llvm-svn: 159044
2012-06-23 07:04:02 +08:00
; CHECK: foo
; CHECK-NOT: andl $-32, %eax
Eliminate the restriction that the array size in an alloca must be i32. This will help reduce the amount of casting required on 64-bit targets. llvm-svn: 104911
2010-05-28 09:14:11 +08:00
}
define void @foo2(i32 %h) {
%p = alloca <2 x i64>, i32 %h, align 32
call void @bar(<2 x i64>* %p)
ret void
FileCheckize tests. llvm-svn: 159044
2012-06-23 07:04:02 +08:00
; CHECK: foo2
Add support for dynamic stack realignment in the presence of dynamic allocas on X86. Basically, this is a reapplication of r158087 with a few fixes. Specifically, (1) the stack pointer is restored from the base pointer before popping callee-saved registers and (2) in obscure cases (see comments in patch) we must cache the value of the original stack adjustment in the prologue and apply it in the epilogue. rdar://11496434 llvm-svn: 160002
2012-07-11 01:45:53 +08:00
; CHECK: andl $-32, %esp
Allocate local registers in order for optimal coloring. Also avoid locals evicting locals just because they want a cheaper register. Problem: MI Sched knows exactly how many registers we have and assumes they can be colored. In cases where we have large blocks, usually from unrolled loops, greedy coloring fails. This is a source of "regressions" from the MI Scheduler on x86. I noticed this issue on x86 where we have long chains of two-address defs in the same live range. It's easy to see this in matrix multiplication benchmarks like IRSmk and even the unit test misched-matmul.ll. A fundamental difference between the LLVM register allocator and conventional graph coloring is that in our model a live range can't discover its neighbors, it can only verify its neighbors. That's why we initially went for greedy coloring and added eviction to deal with the hard cases. However, for singly defined and two-address live ranges, we can optimally color without visiting neighbors simply by processing the live ranges in instruction order. Other beneficial side effects: It is much easier to understand and debug regalloc for large blocks when the live ranges are allocated in order. Yes, global allocation is still very confusing, but it's nice to be able to comprehend what happened locally. Heuristics could be added to bias register assignment based on instruction locality (think late register pairing, banks...). Intuituvely this will make some test cases that are on the threshold of register pressure more stable. llvm-svn: 187139
2013-07-26 02:35:14 +08:00
; CHECK: andl $-32, %e{{..}}
Eliminate the restriction that the array size in an alloca must be i32. This will help reduce the amount of casting required on 64-bit targets. llvm-svn: 104911
2010-05-28 09:14:11 +08:00
}