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hanchenye-llvm-project/llvm/test/CodeGen/SPARC/LeonReplaceFMULSPassUT.ll

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[Sparc][LEON] Removed the parts of the errata fixes implemented using inline assembly as this is not the desired behaviour for end-users. Small change to a unit test to implement this without requiring the inline assembly. llvm-svn: 281047
2016-09-09 22:16:51 +08:00
; RUN: llc %s -O0 -march=sparc -mattr=replacefmuls -o - | FileCheck %s
[SPARC] Fixes for hardware errata on LEON processor. Passes to fix three hardware errata that appear on some LEON processor variants. The instructions FSMULD, FMULS and FDIVS do not work as expected on some LEON processors. This change allows those instructions to be substituted for alternatives instruction sequences that are known to work. These passes only run when selected individually, or as part of a processor defintion. They are not included in general SPARC processor compilations for non-LEON processors or for those LEON processors that do not have these hardware errata. llvm-svn: 273108
2016-06-19 19:03:28 +08:00
[Sparc][LEON] Removed the parts of the errata fixes implemented using inline assembly as this is not the desired behaviour for end-users. Small change to a unit test to implement this without requiring the inline assembly. llvm-svn: 281047
2016-09-09 22:16:51 +08:00
; CHECK-LABEL: test_replace_fmuls
; CHECK: fsmuld %f1, %f0, %f2
; CHECK: fdtos %f2, %f0
; NOFIX-LABEL: test_replace_fmuls
; NOFIX: fmuls %f1, %f0, %f0
define float @test_replace_fmuls(float %a, float %b) {
[SPARC] Fixes for hardware errata on LEON processor. Passes to fix three hardware errata that appear on some LEON processor variants. The instructions FSMULD, FMULS and FDIVS do not work as expected on some LEON processors. This change allows those instructions to be substituted for alternatives instruction sequences that are known to work. These passes only run when selected individually, or as part of a processor defintion. They are not included in general SPARC processor compilations for non-LEON processors or for those LEON processors that do not have these hardware errata. llvm-svn: 273108
2016-06-19 19:03:28 +08:00
entry:
[Sparc][LEON] Removed the parts of the errata fixes implemented using inline assembly as this is not the desired behaviour for end-users. Small change to a unit test to implement this without requiring the inline assembly. llvm-svn: 281047
2016-09-09 22:16:51 +08:00
%mul = fmul float %a, %b
[SPARC] Fixes for hardware errata on LEON processor. Passes to fix three hardware errata that appear on some LEON processor variants. The instructions FSMULD, FMULS and FDIVS do not work as expected on some LEON processors. This change allows those instructions to be substituted for alternatives instruction sequences that are known to work. These passes only run when selected individually, or as part of a processor defintion. They are not included in general SPARC processor compilations for non-LEON processors or for those LEON processors that do not have these hardware errata. llvm-svn: 273108
2016-06-19 19:03:28 +08:00
[Sparc][LEON] Removed the parts of the errata fixes implemented using inline assembly as this is not the desired behaviour for end-users. Small change to a unit test to implement this without requiring the inline assembly. llvm-svn: 281047
2016-09-09 22:16:51 +08:00
ret float %mul
[SPARC] Fixes for hardware errata on LEON processor. Passes to fix three hardware errata that appear on some LEON processor variants. The instructions FSMULD, FMULS and FDIVS do not work as expected on some LEON processors. This change allows those instructions to be substituted for alternatives instruction sequences that are known to work. These passes only run when selected individually, or as part of a processor defintion. They are not included in general SPARC processor compilations for non-LEON processors or for those LEON processors that do not have these hardware errata. llvm-svn: 273108
2016-06-19 19:03:28 +08:00
}