365 lines
13 KiB
YAML
365 lines
13 KiB
YAML
# Build-time build recipe configuration for the FireSim Simulation Manager
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# See https://docs.fires.im/en/stable/Advanced-Usage/Manager/Manager-Configuration-Files.html for documentation of all of these params.
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# this file contains sections that describe hardware designs that /can/ be built.
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# edit config_build.yaml to actually "turn on" a config to be built when you run
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# buildbitstream
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###########
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# Schema:
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###########
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# <NAME>:
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# DESIGN: <>
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# TARGET_CONFIG: <>
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# PLATFORM_CONFIG: Config
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# deploy_quintuplet: null
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# # NOTE: these platform_config_args are for F1 only
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# # they should be set to null if using another platform
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# platform_config_args:
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# fpga_frequency: null
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# build_strategy: null
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# post_build_hook: null
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# metasim_customruntimeconfig: "path to custom runtime config for metasims"
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# bit_builder_recipe:
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# # OPTIONAL: overrides for bit builder recipe
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# # Arg structure should be identical to the args given
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# # in the base_recipe.
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# #bit_builder_arg_overrides:
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# # <ARG>: <OVERRIDE>
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# Quad-core, Rocket-based recipes
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# REQUIRED FOR TUTORIALS
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firesim_rocket_quadcore_nic_l2_llc4mb_ddr3:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: WithNIC_DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.QuadRocketConfig
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PLATFORM_CONFIG: WithAutoILA_BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 90
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# NB: This has a faster host-clock frequency than the NIC-based design, because
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# its uncore runs at half rate relative to the tile.
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firesim_rocket_quadcore_no_nic_l2_llc4mb_ddr3:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimTestChipConfigTweaks_chipyard.QuadRocketConfig
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PLATFORM_CONFIG: WithAutoILA_BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 140
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# Single-core, BOOM-based recipes
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# REQUIRED FOR TUTORIALS
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firesim_boom_singlecore_nic_l2_llc4mb_ddr3:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: WithNIC_DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.LargeBoomConfig
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PLATFORM_CONFIG: WithAutoILA_BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 65
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# NB: This has a faster host-clock frequency than the NIC-based design, because
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# its uncore runs at half rate relative to the tile.
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firesim_boom_singlecore_no_nic_l2_llc4mb_ddr3:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimTestChipConfigTweaks_chipyard.LargeBoomConfig
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PLATFORM_CONFIG: WithAutoILA_BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 65
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# Single-core, CVA6-based recipes
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firesim_cva6_singlecore_no_nic_l2_llc4mb_ddr3:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimConfigTweaks_chipyard.CVA6Config
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PLATFORM_CONFIG: WithAutoILA_BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 90
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# Single-core, Rocket-based recipes with Gemmini
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firesim_rocket_singlecore_gemmini_no_nic_l2_llc4mb_ddr3:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimConfigTweaks_chipyard.GemminiRocketConfig
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PLATFORM_CONFIG: WithAutoILA_BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 110
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# RAM Optimizations enabled by adding _MCRams PLATFORM_CONFIG string
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firesim_boom_singlecore_no_nic_l2_llc4mb_ddr3_ramopts:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimTestChipConfigTweaks_chipyard.LargeBoomConfig
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PLATFORM_CONFIG: WithAutoILA_MCRams_BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 90
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# Supernode configurations -- multiple instances of an SoC in a single simulator
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firesim_supernode_rocket_singlecore_nic_l2_lbp:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: WithNIC_SupernodeFireSimRocketConfig
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PLATFORM_CONFIG: WithAutoILA_BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 85
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# MIDAS Examples -- BUILD SUPPORT ONLY; Can't launch driver correctly on run farm
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midasexamples_gcd:
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PLATFORM: f1
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TARGET_PROJECT: midasexamples
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DESIGN: GCD
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TARGET_CONFIG: NoConfig
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PLATFORM_CONFIG: DefaultF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 75
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# Additional Tutorial Config
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firesim_rocket_singlecore_no_nic_l2_lbp:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.RocketConfig
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PLATFORM_CONFIG: BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 90
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# Additional Tutorial Config
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firesim_rocket_singlecore_sha3_nic_l2_llc4mb_ddr3:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: WithNIC_DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.Sha3RocketConfig
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PLATFORM_CONFIG: BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 65
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# Additional Tutorial Config
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firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.Sha3RocketConfig
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PLATFORM_CONFIG: BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 65
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# Additional Tutorial Config
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firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3_printf:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.Sha3RocketPrintfConfig
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PLATFORM_CONFIG: WithPrintfSynthesis_BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 30
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# Additional Xilinx Vitis/XRT-only Config
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vitis_firesim_rocket_singlecore_no_nic:
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PLATFORM: vitis
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: FireSimRocketMMIOOnlyConfig
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PLATFORM_CONFIG: BaseVitisConfig
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 30 # previously reached 140. using 30 for build speed
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/vitis.yaml
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# Additional Tutorial Config
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firesim_gemmini_rocket_singlecore_no_nic:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: FireSimLeanGemminiRocketConfig
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PLATFORM_CONFIG: BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 30 # AJG: conservative for now, later sweep for higher frequency
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# Additional Tutorial Config
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firesim_gemmini_printf_rocket_singlecore_no_nic:
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PLATFORM: f1
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: FireSimLeanGemminiPrintfRocketConfig
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PLATFORM_CONFIG: WithPrintfSynthesis_BaseF1Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 10 # AJG: conservative for now, later sweep for higher frequency
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/f1.yaml
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# Additional Xilinx Alveo U250-only Config
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alveo_u250_firesim_rocket_singlecore_no_nic:
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PLATFORM: xilinx_alveo_u250
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: FireSimRocketConfig
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PLATFORM_CONFIG: BaseXilinxAlveoConfig
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 60
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml
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# Additional Tutorial Config
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# Additional Xilinx Alveo U250-only Config
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alveo_u250_firesim_gemmini_rocket_singlecore_no_nic:
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PLATFORM: xilinx_alveo_u250
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: FireSimLeanGemminiRocketConfig
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PLATFORM_CONFIG: BaseXilinxAlveoConfig
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 60
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml
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# Additional Xilinx Alveo U280-only Config
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alveo_u280_firesim_rocket_singlecore_no_nic:
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PLATFORM: xilinx_alveo_u280
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: FireSimRocketConfig
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PLATFORM_CONFIG: BaseXilinxAlveoConfig
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 60
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u280.yaml
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# Additional Xilinx Alveo U200-only Config
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alveo_u200_firesim_rocket_singlecore_no_nic:
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PLATFORM: xilinx_alveo_u200
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: FireSimRocketConfig
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PLATFORM_CONFIG: BaseXilinxAlveoConfig
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 60
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u200.yaml
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# Xilinx VCU118-only Config
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xilinx_vcu118_firesim_rocket_singlecore_4GB_no_nic:
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PLATFORM: xilinx_vcu118
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: FireSimRocket4GiBDRAMConfig
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PLATFORM_CONFIG: BaseXilinxVCU118Config
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 90
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/xilinx_vcu118.yaml
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# RHSResearch Nitefury II-only Config
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nitefury_firesim_rocket_singlecore_no_nic:
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PLATFORM: rhsresearch_nitefury_ii
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TARGET_PROJECT: firesim
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DESIGN: FireSim
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TARGET_CONFIG: FireSimRocket1GiBDRAMConfig
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PLATFORM_CONFIG: BaseNitefuryConfig
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deploy_quintuplet: null
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platform_config_args:
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fpga_frequency: 50
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build_strategy: TIMING
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post_build_hook: null
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metasim_customruntimeconfig: null
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bit_builder_recipe: bit-builder-recipes/rhsresearch_nitefury_ii.yaml
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