31 lines
1.4 KiB
Plaintext
31 lines
1.4 KiB
Plaintext
[submodule "platforms/f1/aws-fpga"]
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path = platforms/f1/aws-fpga
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url = https://github.com/firesim/aws-fpga-firesim
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[submodule "sw/firesim-software"]
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path = sw/firesim-software
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url = https://github.com/firesim/firesim-software
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[submodule "target-design/chipyard"]
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path = target-design/chipyard
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url = https://github.com/ucb-bar/project-template
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[submodule "sw/network-benchmarks"]
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path = sw/network-benchmarks
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url = https://github.com/firesim/network-benchmarks.git
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[submodule "deploy/workloads/memcached-thread-imbalance/mutilate-loadgen-riscv-release"]
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path = deploy/workloads/memcached-thread-imbalance/mutilate-loadgen-riscv-release
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url = https://github.com/firesim/mutilate-loadgen-riscv-release
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[submodule "deploy/workloads/Speckle"]
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path = deploy/workloads/Speckle
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url = https://github.com/ccelio/Speckle.git
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[submodule "deploy/workloads/ccbench-cache-sweep/ccbench"]
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path = deploy/workloads/ccbench-cache-sweep/ccbench
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url = https://github.com/ucb-bar/ccbench
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[submodule "deploy/workloads/runscripts/gapbs-scripts/gapbs"]
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path = deploy/workloads/runscripts/gapbs-scripts/gapbs
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url = https://github.com/sbeamer/gapbs.git
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[submodule "deploy/workloads/coremark/riscv-coremark"]
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path = deploy/workloads/coremark/riscv-coremark
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url = https://github.com/riscv-boom/riscv-coremark
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[submodule "sim/midas/src/main/cc/dramsim2"]
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path = sim/midas/src/main/cc/dramsim2
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url = https://github.com/firesim/DRAMSim2.git
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