54 lines
2.4 KiB
ReStructuredText
54 lines
2.4 KiB
ReStructuredText
.. |fpga_name| replace:: RHS Research Nitefury II
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.. _fpga_name: https://rhsresearch.com/collections/rhs-public/products/nitefury-xilinx-artix-fpga-kit-in-nvme-ssd-form-factor-2280-key-m
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.. |fpga_power_info| replace:: This step is not required for the Nitefury, since all
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power is delivered via M.2. or Thunderbolt.
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.. |hwdb_entry_name| replace:: ``nitefury_firesim_rocket_singlecore_no_nic``
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.. |platform_name| replace:: rhsresearch_nitefury_ii
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.. |board_name| replace:: nitefury_ii
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.. |tool_type| replace:: Xilinx Vivado
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.. |tool_type_lab| replace:: Xilinx Vivado Lab
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.. |example_var| replace:: ``XILINX_VIVADO``
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.. |deploy_manager_code| replace:: ``RHSResearchNitefuryIIInstanceDeployManager``
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.. |fpga_spi_part_number| replace:: ``s25fl256xxxxxx0-spi-x1_x2_x4``
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.. |fpga_attach_prereq| replace:: into either an open M.2. slot on your machine or into
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an M.2. to Thunderbolt enclosure (then attach the enclosure to your system via a
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Thunderbolt cable). We have successfully used this enclosure:
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https://www.amazon.com/ORICO-Enclosure-Compatible-Thunderbolt-Type-C-M2V01/dp/B08R9DMFFT.
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Before permanently installing your Nitefury into your M.2. slot or enclosure, ensure
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that you have attached the ribbon cable that will be used for JTAG to the underside
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of the board (see step 4 below).
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.. |jtag_help| replace:: JTAG. For the Nitefury, this requires attaching the 14-pin JTAG
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adapter included with the board to the board using the included ribbon cable, then
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attaching a USB to JTAG adapter such as the Digilent HS2:
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https://digilent.com/shop/jtag-hs2-programming-cable/.
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.. |extra_mcs| replace:: file from step 7.
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.. |mcs_info| replace:: Inside, you will find three files; the one we are currently
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interested in will be called ``firesim.mcs``. Note the full path of this
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``firesim.mcs`` file for the next step.
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.. |dip_switch_extra| replace:: power).
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.. |nitefury_patch_xdma| replace:: The directory you are now in contains the XDMA kernel
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module. For the Nitefury to work, we will need to make one modification to the
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driver. Find the line containing ``#define XDMA_ENGINE_XFER_MAX_DESC``. Change the
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value on this line from ``0x800`` to ``16``. Then, build and install the driver:
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.. |jtag_cable_reminder| replace:: Remember to keep the USB cable for JTAG connected at
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all times when running FireSim simulations (it is used to program the FPGA).
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.. include:: Xilinx-XDMA-Template.rst
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