# Build-time build recipe configuration for the FireSim Simulation Manager # See https://docs.fires.im/en/stable/Advanced-Usage/Manager/Manager-Configuration-Files.html for documentation of all of these params. # this file contains sections that describe hardware designs that /can/ be built. # edit config_build.yaml to actually "turn on" a config to be built when you run # buildbitstream ########### # Schema: ########### # : # DESIGN: <> # TARGET_CONFIG: <> # PLATFORM_CONFIG: Config # deploy_quintuplet: null # # NOTE: these platform_config_args are for F1 only # # they should be set to null if using another platform # platform_config_args: # fpga_frequency: null # build_strategy: null # post_build_hook: null # metasim_customruntimeconfig: "path to custom runtime config for metasims" # bit_builder_recipe: # # OPTIONAL: overrides for bit builder recipe # # Arg structure should be identical to the args given # # in the base_recipe. # #bit_builder_arg_overrides: # # : # Quad-core, Rocket-based recipes # REQUIRED FOR TUTORIALS firesim_rocket_quadcore_nic_l2_llc4mb_ddr3: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: WithNIC_DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.QuadRocketConfig PLATFORM_CONFIG: WithAutoILA_BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 90 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # NB: This has a faster host-clock frequency than the NIC-based design, because # its uncore runs at half rate relative to the tile. firesim_rocket_quadcore_no_nic_l2_llc4mb_ddr3: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimTestChipConfigTweaks_chipyard.QuadRocketConfig PLATFORM_CONFIG: WithAutoILA_BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 140 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # Single-core, BOOM-based recipes # REQUIRED FOR TUTORIALS firesim_boom_singlecore_nic_l2_llc4mb_ddr3: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: WithNIC_DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.LargeBoomConfig PLATFORM_CONFIG: WithAutoILA_BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 65 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # NB: This has a faster host-clock frequency than the NIC-based design, because # its uncore runs at half rate relative to the tile. firesim_boom_singlecore_no_nic_l2_llc4mb_ddr3: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimTestChipConfigTweaks_chipyard.LargeBoomConfig PLATFORM_CONFIG: WithAutoILA_BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 65 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # Single-core, CVA6-based recipes firesim_cva6_singlecore_no_nic_l2_llc4mb_ddr3: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimConfigTweaks_chipyard.CVA6Config PLATFORM_CONFIG: WithAutoILA_BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 90 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # Single-core, Rocket-based recipes with Gemmini firesim_rocket_singlecore_gemmini_no_nic_l2_llc4mb_ddr3: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimConfigTweaks_chipyard.GemminiRocketConfig PLATFORM_CONFIG: WithAutoILA_BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 110 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # RAM Optimizations enabled by adding _MCRams PLATFORM_CONFIG string firesim_boom_singlecore_no_nic_l2_llc4mb_ddr3_ramopts: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimTestChipConfigTweaks_chipyard.LargeBoomConfig PLATFORM_CONFIG: WithAutoILA_MCRams_BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 90 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # Supernode configurations -- multiple instances of an SoC in a single simulator firesim_supernode_rocket_singlecore_nic_l2_lbp: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: WithNIC_SupernodeFireSimRocketConfig PLATFORM_CONFIG: WithAutoILA_BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 85 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # MIDAS Examples -- BUILD SUPPORT ONLY; Can't launch driver correctly on run farm midasexamples_gcd: PLATFORM: f1 TARGET_PROJECT: midasexamples DESIGN: GCD TARGET_CONFIG: NoConfig PLATFORM_CONFIG: DefaultF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 75 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # Additional Tutorial Config firesim_rocket_singlecore_no_nic_l2_lbp: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.RocketConfig PLATFORM_CONFIG: BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 90 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # Additional Tutorial Config firesim_rocket_singlecore_sha3_nic_l2_llc4mb_ddr3: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: WithNIC_DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.Sha3RocketConfig PLATFORM_CONFIG: BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 65 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # Additional Tutorial Config firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.Sha3RocketConfig PLATFORM_CONFIG: BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 65 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # Additional Tutorial Config firesim_rocket_singlecore_sha3_no_nic_l2_llc4mb_ddr3_printf: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: DDR3FRFCFSLLC4MB_WithDefaultFireSimBridges_WithFireSimHighPerfConfigTweaks_chipyard.Sha3RocketPrintfConfig PLATFORM_CONFIG: WithPrintfSynthesis_BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 30 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # Additional Xilinx Vitis/XRT-only Config vitis_firesim_rocket_singlecore_no_nic: PLATFORM: vitis TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: FireSimRocketMMIOOnlyConfig PLATFORM_CONFIG: BaseVitisConfig deploy_quintuplet: null platform_config_args: fpga_frequency: 30 # previously reached 140. using 30 for build speed build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/vitis.yaml # Additional Tutorial Config firesim_gemmini_rocket_singlecore_no_nic: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: FireSimLeanGemminiRocketConfig PLATFORM_CONFIG: BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 30 # AJG: conservative for now, later sweep for higher frequency build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # Additional Tutorial Config firesim_gemmini_printf_rocket_singlecore_no_nic: PLATFORM: f1 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: FireSimLeanGemminiPrintfRocketConfig PLATFORM_CONFIG: WithPrintfSynthesis_BaseF1Config deploy_quintuplet: null platform_config_args: fpga_frequency: 10 # AJG: conservative for now, later sweep for higher frequency build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/f1.yaml # Additional Xilinx Alveo U250-only Config alveo_u250_firesim_rocket_singlecore_no_nic: PLATFORM: xilinx_alveo_u250 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: FireSimRocketConfig PLATFORM_CONFIG: BaseXilinxAlveoConfig deploy_quintuplet: null platform_config_args: fpga_frequency: 60 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml # Additional Tutorial Config # Additional Xilinx Alveo U250-only Config alveo_u250_firesim_gemmini_rocket_singlecore_no_nic: PLATFORM: xilinx_alveo_u250 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: FireSimLeanGemminiRocketConfig PLATFORM_CONFIG: BaseXilinxAlveoConfig deploy_quintuplet: null platform_config_args: fpga_frequency: 60 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u250.yaml # Additional Xilinx Alveo U280-only Config alveo_u280_firesim_rocket_singlecore_no_nic: PLATFORM: xilinx_alveo_u280 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: FireSimRocketConfig PLATFORM_CONFIG: BaseXilinxAlveoConfig deploy_quintuplet: null platform_config_args: fpga_frequency: 60 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u280.yaml # Additional Xilinx Alveo U200-only Config alveo_u200_firesim_rocket_singlecore_no_nic: PLATFORM: xilinx_alveo_u200 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: FireSimRocketConfig PLATFORM_CONFIG: BaseXilinxAlveoConfig deploy_quintuplet: null platform_config_args: fpga_frequency: 60 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/xilinx_alveo_u200.yaml # Xilinx VCU118-only Config xilinx_vcu118_firesim_rocket_singlecore_4GB_no_nic: PLATFORM: xilinx_vcu118 TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: FireSimRocket4GiBDRAMConfig PLATFORM_CONFIG: BaseXilinxVCU118Config deploy_quintuplet: null platform_config_args: fpga_frequency: 90 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/xilinx_vcu118.yaml # RHSResearch Nitefury II-only Config nitefury_firesim_rocket_singlecore_no_nic: PLATFORM: rhsresearch_nitefury_ii TARGET_PROJECT: firesim DESIGN: FireSim TARGET_CONFIG: FireSimRocket1GiBDRAMConfig PLATFORM_CONFIG: BaseNitefuryConfig deploy_quintuplet: null platform_config_args: fpga_frequency: 50 build_strategy: TIMING post_build_hook: null metasim_customruntimeconfig: null bit_builder_recipe: bit-builder-recipes/rhsresearch_nitefury_ii.yaml