Commit Graph

54 Commits

Author SHA1 Message Date
abejgonzalez 1dfae12f2e Update merge strategy for caching | Add macro annotations 2023-05-29 22:29:41 -07:00
abejgonzalez c48caf3952 Merge remote-tracking branch 'origin/use-fat-jars' into cy-fs-fat-jar 2023-05-29 16:05:43 -07:00
Jerry Zhao 6f2175635a Bump to chisel 3.5.6 2023-04-05 19:22:06 -07:00
abejgonzalez 2f13158e0e Initial support for fat jars 2023-03-03 17:17:16 -08:00
Jerry Zhao a560cd1b8e Bump to scala 2.13/chisel 3.5.5 2023-01-27 13:52:18 -08:00
Benjamin Morse a513c0ef58
Add scalaFix (#1393)
* adding scalaFix to the projecting, using two make targets, `scala-lint` and `scala-lint-check`
* adding documentation

Co-authored-by: David Biancolin <david.biancolin@sifive.com>
2023-01-25 10:34:10 -08:00
Jerry Zhao 2fca0537ce Bump Rocketchip/chipyard/chisel/bloop 2022-09-19 16:45:47 +00:00
abejgonzalez ab1df7a293 Change references to dev/master [ci skip] 2022-02-15 11:07:37 -08:00
abejgonzalez e3fb3b6b28 Bump to Chisel 3.5.1 2022-02-08 09:18:17 -08:00
David Biancolin a573288f25 [sbt] Use slash syntax for scoping 2022-02-03 04:39:10 +00:00
abejgonzalez 4d36e5ba44 Bump build.sbt for Chisel fix 2022-01-20 20:28:20 -08:00
abejgonzalez 0a68c1b24a Bump to Chisel 3.5.0 2022-01-17 15:52:09 -08:00
David Biancolin ba479a669a Bump to 3.5.0-RC1 2021-12-14 23:53:13 +00:00
David Biancolin 1e6d786158 Bump to Chisel 3.4.4 2021-12-08 07:01:23 +00:00
David Biancolin 7591ff12cf Copy in FIRRTL testutils into midas 2021-12-01 23:56:58 +00:00
David Biancolin 395d40b98c [WIP] Used published dependencies for Chisel + FIRRTL 2021-12-01 23:31:33 +00:00
David Biancolin 758512ee50 Remove the now unnecessary barstools dependency 2021-07-06 23:53:55 +00:00
David Biancolin afeb41bd55
Remove unneeded chiselLib 2021-02-12 19:52:32 -08:00
David Biancolin f7d30b6cc8 Use the chisel naming plugin 2021-02-12 11:59:23 -08:00
Abraham Gonzalez 615eec869c
Update sim/build.sbt
Co-authored-by: Tim Snyder <timothy.snyder@sifive.com>
2020-12-11 18:37:42 -07:00
David Biancolin 48fc5e9d6b Fix tests using firrtl testutils 2020-12-08 23:26:55 -08:00
abejgonzalez 2addd72598 Print full stacktraces (traceLevel default 0) | Use workspaceDirectory for chisel SBT proj 2020-12-03 14:56:14 -08:00
abejgonzalez 45c3c25d09 Ignore linting for tracelevel 2020-12-03 10:57:57 -08:00
abejgonzalez 4752009e98 Point chisel project to proper location 2020-11-30 21:22:08 -08:00
abejgonzalez 5e64d78300 Bump library dependencies 2020-11-28 16:01:12 -08:00
David Biancolin 5a1c4e727c [SBT] Don't push stuff on to midas's RT classpath
Invoke from the parent project instead
2020-06-21 19:52:12 +00:00
David Biancolin 85013e4041 Remove FIRRTL API mappings until they can be done in an automated fashion 2020-05-31 20:28:46 +00:00
David Biancolin 133545a683 [SBT] Don't fork scala tesets for firesim subproject 2020-05-26 22:07:32 -07:00
David Biancolin a537bfad75 [SBT] Provide a setting a key to define subdir to put scaladoc 2020-05-25 12:07:27 -07:00
David Biancolin 70350f1d3d Enable uni[Scala]doc builds for firesim libraries 2020-05-20 23:48:39 -07:00
David Biancolin 401bf191f5 Use Chipyard's generator for all target projects
... and delete the unnessecary duplicated code
2020-05-16 22:44:16 +00:00
David Biancolin e5598dfd1c Pull test sources from firrtl-test.jar. Delete copies 2020-05-14 03:21:26 +00:00
David Biancolin 00e7a7cd37 FIRRTL 1.3 Bump -- CY submodule out-of-date 2020-05-12 18:49:18 +00:00
David Biancolin f82e115c66 Rocket Chip Bump 4/2020. THIS COMMIT WILL NOT COMPILE; BUMP CY
Two major changes:
Abstract reset and async reset support introduced -> change Async reset
handling
Old generator utilties removed -> copy them into FireSim for
now

More Nasti <-> AXI4 hacks

Update onExprt in AsyncReset coerce

Drop gemmini's host frequency

Bump SBT version and provide a missing plugin for FSimAsTop

Regenerate AGFIs
2020-04-18 05:14:41 +00:00
Jerry Zhao bccd86aa26 Update naming, docs, ChangeLog, for gen unification 2020-02-23 22:50:38 -08:00
Jerry Zhao 0ccb6049ae Modifications for generator unification 2020-02-13 11:29:16 -08:00
David Biancolin f28c1b1ba0 Merge in dev; bump chipyard; fix FSimAsTop 2019-12-10 22:48:11 +00:00
David Biancolin de472d800f Eschew use of target-rtl symlink 2019-12-10 21:46:51 +00:00
David Biancolin 9bd6679ea8 Serializable Endpoints & Golden Gate as a Stage 2019-10-04 22:43:46 -07:00
David Biancolin 33be2c06fb [SBT] Don't aggregate firechip into firesim SBT project 2019-07-23 15:41:38 -07:00
David Biancolin 65be3cae99 Add resolvers to help pull in firrtl-intrp 2019-06-28 19:15:02 +00:00
David Biancolin f41ca51414 Fix up some naming issues 2019-06-28 17:56:11 +00:00
David Biancolin 71785a6039 firechip renamed to chipyard 2019-06-28 05:33:04 +00:00
David Biancolin ddad676138 Bump REBAR and fix ProjectRefs 2019-05-29 22:28:49 +00:00
David Biancolin 0205a85d18 Major reorganization to enable FireSim-as-a-library 2019-05-29 00:48:03 +00:00
David Biancolin 3b556842fa [SBT] Manage FIRRTL dependency manually; add a midas targetutils package
This fixes two major limitations:
- stops using local maven to host the FIRRTL dependency
- creates an upstream project to hold MIDAS's target-land annotations,
that can be used in RC (breaking the existing circular dep.)
2018-11-30 12:45:37 -08:00
David Biancolin cb23dc0382 [scalatests] Fork the JVM for each ScalaTest suite 2018-11-09 05:41:11 +00:00
Howard Mao 84c468c56a Remove FIRRTL dependency
This reverts commit 54d1ce00ff.
2018-10-01 23:14:49 +00:00
Howard Mao 7d2ecdac65 Merge branch 'dev' into dev-tracerv 2018-09-24 18:21:42 +00:00
Sagar Karandikar 2912e800c7 reenable boom 2018-09-24 05:39:19 +00:00