replica
/
firesim
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Remove GenericParameterizedBundle (not needed with new chisel)

This commit is contained in:
Jerry Zhao 2023-08-18 14:59:10 -07:00
parent 61ec026a98
commit 67e70ec96d
1 changed files with 5 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
sim/midas/src/main/scala/midas/models/dram/DramCommon.scala
View File

@ -2,7 +2,6 @@ package midas
package models package models
import org.chipsalliance.cde.config.Parameters import org.chipsalliance.cde.config.Parameters
import freechips.rocketchip.util.GenericParameterizedBundle
import chisel3._ import chisel3._
import chisel3.util._ import chisel3.util._
@ -345,7 +344,7 @@ class FirstReadyFCFSEntry(key: DRAMBaseConfig)(implicit p: Parameters) extends M
// timing and resource constraints are met. The controller must also ensure CAS // timing and resource constraints are met. The controller must also ensure CAS
// commands use the open ROW. // commands use the open ROW.
class BankStateTrackerO(key: DramOrganizationParams) extends GenericParameterizedBundle(key) class BankStateTrackerO(val key: DramOrganizationParams) extends Bundle
with CommandLegalBools { with CommandLegalBools {
import DRAMMasEnums._ import DRAMMasEnums._
@ -355,7 +354,7 @@ class BankStateTrackerO(key: DramOrganizationParams) extends GenericParameterize
def isRowHit(ref: MASEntry): Bool = ref.rowAddr === openRow && state === bank_active def isRowHit(ref: MASEntry): Bool = ref.rowAddr === openRow && state === bank_active
} }
class BankStateTrackerIO(val key: DramOrganizationParams) extends GenericParameterizedBundle(key) class BankStateTrackerIO(val key: DramOrganizationParams) extends Bundle
with HasLegalityUpdateIO { with HasLegalityUpdateIO {
val out = new BankStateTrackerO(key) val out = new BankStateTrackerO(key)
val cmdUsesThisBank = Input(Bool()) val cmdUsesThisBank = Input(Bool())
@ -443,7 +442,7 @@ class BankStateTracker(key: DramOrganizationParams) extends Module with HasDRAMM
// timing and resource constraints are met. The controller must also ensure CAS // timing and resource constraints are met. The controller must also ensure CAS
// commands use the open ROW. // commands use the open ROW.
class RankStateTrackerO(key: DramOrganizationParams) extends GenericParameterizedBundle(key) class RankStateTrackerO(val key: DramOrganizationParams) extends Bundle
with CommandLegalBools { with CommandLegalBools {
import DRAMMasEnums._ import DRAMMasEnums._
val canREF = Output(Bool()) val canREF = Output(Bool())
@ -452,7 +451,7 @@ class RankStateTrackerO(key: DramOrganizationParams) extends GenericParameterize
val banks = Vec(key.maxBanks, Output(new BankStateTrackerO(key))) val banks = Vec(key.maxBanks, Output(new BankStateTrackerO(key)))
} }
class RankStateTrackerIO(val key: DramOrganizationParams) extends GenericParameterizedBundle(key) class RankStateTrackerIO(val key: DramOrganizationParams) extends Bundle
with HasLegalityUpdateIO with HasDRAMMASConstants { with HasLegalityUpdateIO with HasDRAMMASConstants {
val rank = new RankStateTrackerO(key) val rank = new RankStateTrackerO(key)
val tCycle = Input(UInt(maxDRAMTimingBits.W)) val tCycle = Input(UInt(maxDRAMTimingBits.W))
@ -605,7 +604,7 @@ class CommandBusMonitor extends Module {
} }
} }
class RankRefreshUnitIO(key: DramOrganizationParams) extends GenericParameterizedBundle(key) { class RankRefreshUnitIO(val key: DramOrganizationParams) extends Bundle {
val rankStati = Vec(key.maxRanks, Flipped(new RankStateTrackerO(key))) val rankStati = Vec(key.maxRanks, Flipped(new RankStateTrackerO(key)))
// The user may have instantiated multiple ranks, but is only modelling a single // The user may have instantiated multiple ranks, but is only modelling a single
// rank system. Don't issue refreshes to ranks we aren't modelling // rank system. Don't issue refreshes to ranks we aren't modelling