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This commit is contained in:
Sagar Karandikar 2023-06-28 22:56:10 +00:00
parent 09175f04c4
commit 2c9c1c6807
8 changed files with 25 additions and 4 deletions
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9
docs/Getting-Started-Guides/On-Premises-FPGA-Getting-Started/Initial-Setup/RHS-Research-Nitefury-II.rst Normal file
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.. |fpga_name| replace:: RHS Research Nitefury II
.. |hwdb_entry_name| replace:: ``nitefury_firesim_rocket_singlecore_no_nic``
.. |platform_name| replace:: rhsresearch_nitefury_ii
.. |board_name| replace:: nitefury_ii
.. |tool_type| replace:: Xilinx Vivado
.. |example_var| replace:: XILINX_VIVADO
.. |deploy_manager_code| replace:: ``RHSResearchNitefuryIIInstanceDeployManager``
.. include:: Xilinx-XDMA-Template.rst

2
docs/Getting-Started-Guides/On-Premises-FPGA-Getting-Started/Initial-Setup/Xilinx-Alveo-U250.rst
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@ -6,4 +6,4 @@
.. |example_var| replace:: XILINX_VIVADO .. |example_var| replace:: XILINX_VIVADO
.. |deploy_manager_code| replace:: ``XilinxAlveoU250InstanceDeployManager`` .. |deploy_manager_code| replace:: ``XilinxAlveoU250InstanceDeployManager``
.. include:: Xilinx-Alveo-Template.rst .. include:: Xilinx-XDMA-Template.rst

2
docs/Getting-Started-Guides/On-Premises-FPGA-Getting-Started/Initial-Setup/Xilinx-Alveo-U280.rst
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@ -6,4 +6,4 @@
.. |example_var| replace:: XILINX_VIVADO .. |example_var| replace:: XILINX_VIVADO
.. |deploy_manager_code| replace:: ``XilinxAlveoU280InstanceDeployManager`` .. |deploy_manager_code| replace:: ``XilinxAlveoU280InstanceDeployManager``
.. include:: Xilinx-Alveo-Template.rst .. include:: Xilinx-XDMA-Template.rst

9
docs/Getting-Started-Guides/On-Premises-FPGA-Getting-Started/Initial-Setup/Xilinx-VCU118.rst Normal file
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.. |fpga_name| replace:: Xilinx VCU118
.. |hwdb_entry_name| replace:: ``xilinx_vcu118_firesim_rocket_singlecore_no_nic``
.. |platform_name| replace:: xilinx_vcu118
.. |board_name| replace:: vcu118
.. |tool_type| replace:: Xilinx Vivado
.. |example_var| replace:: XILINX_VIVADO
.. |deploy_manager_code| replace:: ``XilinxVCU118InstanceDeployManager``
.. include:: Xilinx-XDMA-Template.rst

1
docs/Getting-Started-Guides/On-Premises-FPGA-Getting-Started/Initial-Setup/Xilinx-Vitis-FPGAs.rst
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@ -5,6 +5,7 @@
.. |tool_type| replace:: Xilinx XRT/Vitis .. |tool_type| replace:: Xilinx XRT/Vitis
.. |example_var| replace:: XILINX_XRT .. |example_var| replace:: XILINX_XRT
.. include:: ../../Terminology-Template.rst
FPGA and Tool Setup FPGA and Tool Setup
=================== ===================

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docs/Getting-Started-Guides/On-Premises-FPGA-Getting-Started/Initial-Setup/Xilinx-Alveo-Template.rst → docs/Getting-Started-Guides/On-Premises-FPGA-Getting-Started/Initial-Setup/Xilinx-XDMA-Template.rst
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.. include:: ../../Terminology-Template.rst
FPGA Software Setup FPGA Software Setup
=================== ===================

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docs/Getting-Started-Guides/On-Premises-FPGA-Getting-Started/RHS-Research-Nitefury-II-FPGAs.rst
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@ -7,6 +7,6 @@
.. toctree:: .. toctree::
:maxdepth: 3 :maxdepth: 3
Initial-Setup/Xilinx-Alveo-U250 Initial-Setup/RHS-Research-Nitefury-II
Running-Simulations/Running-Single-Node-Simulation-Xilinx-Alveo-U250 Running-Simulations/Running-Single-Node-Simulation-Xilinx-Alveo-U250
Building-a-FireSim-Bitstream/Xilinx-Alveo-U250 Building-a-FireSim-Bitstream/Xilinx-Alveo-U250

2
docs/Getting-Started-Guides/On-Premises-FPGA-Getting-Started/Xilinx-VCU118-FPGAs.rst
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@ -7,6 +7,6 @@
.. toctree:: .. toctree::
:maxdepth: 3 :maxdepth: 3
Initial-Setup/Xilinx-Alveo-U250 Initial-Setup/Xilinx-VCU118
Running-Simulations/Running-Single-Node-Simulation-Xilinx-Alveo-U250 Running-Simulations/Running-Single-Node-Simulation-Xilinx-Alveo-U250
Building-a-FireSim-Bitstream/Xilinx-Alveo-U250 Building-a-FireSim-Bitstream/Xilinx-Alveo-U250