2018-05-14 03:40:34 +08:00
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##################
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# Parameters #
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##################
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2018-08-08 12:51:24 +08:00
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# Multiple target-projects co-exist in firesim, their sources exist in:
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# src/main/{cc, scala, makefrag}/<project-name>
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#
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# Currently these projects are:
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# firesim: the default, rocket-chip-based target designs
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# midasexamples: simple chisel designs, demonstrating how to build midas-style simulators
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ROOT_PROJECT ?= firesim
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2018-05-14 03:40:34 +08:00
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2018-08-08 12:51:24 +08:00
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# Users can override this to point at a makefrag defined in a parent project that submodules firesim
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ROOT_PROJECT_MAKEFRAG ?= src/main/makefrag/$(ROOT_PROJECT)/Makefrag
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2018-05-14 03:40:34 +08:00
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default: compile
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2018-08-08 12:51:24 +08:00
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PLATFORM := f1
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2018-05-14 03:40:34 +08:00
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2018-08-08 12:51:24 +08:00
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########################
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# Timestamp & Patching #
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########################
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firesim_base_dir := $(abspath .)
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timestamps = $(addprefix $(firesim_base_dir)/, $(addsuffix .timestamp, firrtl))
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2018-05-14 03:40:34 +08:00
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2018-08-08 12:51:24 +08:00
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$(firesim_base_dir)/firrtl.timestamp: $(shell find $(firesim_base_dir)/firrtl/$(src_path) -name "*.scala")
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cd $(firesim_base_dir)/firrtl && $(SBT) $(SBT_FLAGS) publishLocal
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touch $@
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2018-05-14 03:40:34 +08:00
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SBT ?= sbt
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SBT_FLAGS ?= -J-Xmx16G -J-Xss8M -J-XX:MaxPermSize=256M -J-XX:MaxMetaspaceSize=512M -J-XX:ReservedCodeCacheSize=1G
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sbt:
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$(SBT) $(SBT_FLAGS)
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test:
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$(SBT) $(SBT_FLAGS) test
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2018-08-08 12:51:24 +08:00
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# Include target-specific sources and input generation recipes
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include $(ROOT_PROJECT_MAKEFRAG)
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2018-05-14 03:40:34 +08:00
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2018-08-08 12:51:24 +08:00
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verilog: $(VERILOG)
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compile: $(VERILOG)
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2018-05-14 03:40:34 +08:00
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2018-08-08 12:51:24 +08:00
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# All target-agnostic firesim recipes are defined here
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include Makefrag
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2018-05-14 03:40:34 +08:00
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