2018-05-14 03:40:34 +08:00
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FireSim Basics
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===================================
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FireSim is a cycle-accurate, FPGA-accelerated scale-out computer system
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simulation platform developed in the Berkeley Architecture Research Group in
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the EECS Department at the University of California, Berkeley.
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FireSim is capable of simulating from **one to thousands of multi-core compute
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nodes**, derived from **silicon-proven** and **open** target-RTL, with an optional
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cycle-accurate network simulation tying them together. FireSim runs on FPGAs in **public
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cloud** environments like AWS EC2 F1, removing the high capex traditionally
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involved in large-scale FPGA-based simulation.
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FireSim is useful both for datacenter architecture research as well as running
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many single-node architectural experiments in parallel on FPGAs. By harnessing
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a standardized host platform and providing a large amount of
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automation/tooling, FireSim drastically simplifies the process of building and
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deploying large-scale FPGA-based hardware simulations.
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To learn more, see the `FireSim website <https://fires.im>`__ and the FireSim
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`ISCA 2018 paper <#comingsoon>`__.
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Two common use cases:
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--------------------------
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Single-Node Simulation, in Parallel
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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In this mode, FireSim allows for simulation of individual Rocket
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Chip-based nodes without a network, which allows individual simulations to run
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at ~150 MHz. The FireSim manager has the ability to automatically distribute
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jobs to many parallel simulations, expediting the process of running large
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workloads like SPEC. For example, users can run all of SPECInt2017 on Rocket Chip
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in ~1 day by running the 10 separate workloads in parallel on 10 FPGAs.
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Datacenter/Cluster Simulation
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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In this mode, FireSim also models a cycle-accurate network with
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parameterizeable bandwidth and link latency, as well as configurable
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topology, to accurately model current and future datacenter-scale
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systems. For example, FireSim has been used to simulate 1024 quad-core
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Rocket Chip-based nodes, interconnected by a 200 Gbps, 2us network.
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Background/Terminology
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---------------------------
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.. figure:: img/firesim_env.png
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:alt: FireSim Infrastructure Setup
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FireSim Infrastructure Diagram
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- **FireSim Manager**: This program (located in ``firesim/deploy/``,
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called ``firesim``) automates the work required to launch FPGA builds
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and run simulations. Most users will only have to interact with the
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manager most of the time.
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- **Manager Instance**: This is the machine on AWS that you will
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SSH-into. It only needs to be powerful enough to run Chisel
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builds/target software builds.
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- **Build Farm**: These are instances that are elastically
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started/terminated by the FireSim manager when you run FPGA builds.
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The manager will automatically ship builds to these instances and run
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the Verilog -> FPGA Image process on them.
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- **Run Farm**: These are F1 (and M4) instances that the manager
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automatically launches and deploys simulations onto.
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Using FireSim/The FireSim Workflow
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-------------------------------------
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2018-05-17 04:10:31 +08:00
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The tutorials that follow this page will guide you through the complete flow for
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getting an example FireSim simulation up and running. At the end of this
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tutorial, you'll have a simulation that simulates a single quad-core Rocket
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Chip-based node with a 4 MB LLC, 16 GB DDR3, and no NIC. After this, you'll
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have the option to continue on to a tutorial that describes how to simulate
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many of these single-node simulations in parallel or how to simulate
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a globally-cycle-accurate cluster-scale FireSim simulation. Here's a high-level
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outline of what we'll be doing:
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1. Initial Setup/Installation
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a. First-time AWS User Setup
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You can skip this if you already have an AWS account/payment method
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set up.
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b. Configuring required AWS resources in your account:
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This sets up the appropriate VPCs/subnets/security groups required to
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run FireSim.
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c. Setting up a "Manager Instance" from which you will coordinate
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building/deploying simulations.
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2. Single-node simulation tutorial
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a. Building a FireSim AFI: Running a build process that goes from Chisel -> Verilog and then
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Verilog -> AFI/AGFI (FPGA Image). This process automatically creates "Build Farm" instances,
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runs builds on them, and terminates them when AGFI completion is
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completed. All Vivado reports/outputs are copied onto your Manager
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Instance before they are terminated.
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b. Launching instances for an FPGA "Run Farm" consisting of ``f1.2xlarge``,
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``f1.16xlarge``, and ``m4.16xlarge`` instances.
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c. Deploying simulations on your "Run Farm" once you have an AFI/AGFI.
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2018-05-14 03:40:34 +08:00
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Generally speaking, you only need to follow step 4 if you're modifying
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Chisel RTL or changing non-runtime configurable hardware parameters. If
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someone has given you a prebuilt AFI/AGFI, you can skip the instructions
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for step 4.
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