replica
/
diffblue-hw-cbmc
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Verilog 2000 sized parameters

This commit is contained in:
Daniel Kroening 2013-04-19 12:34:13 +00:00
parent 8cdd2f4025
commit 2e0c62680b
1 changed files with 6 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/verilog/parser.y
View File

@ -1151,10 +1151,12 @@ list_of_param_assign:
{ $$=$1; mto($$, $3); }
;
param_assign: param_identifier '=' const_expression
{ init($$, ID_parameter);
addswap($$, ID_identifier, $1);
addswap($$, ID_value, $3); }
param_assign: signing_opt packed_dimension_brace param_identifier '=' const_expression
{ // $1 and $2 implement Verilog 2000 sized parameters,
// which can be ignored
init($$, ID_parameter);
addswap($$, ID_identifier, $3);
addswap($$, ID_value, $5); }
;
param_identifier: TOK_CHARSTR;